NULL
};
-static const char * const hv_boards[] __initconst = {
- "fsl,P2041RDB-hv",
- "fsl,P3041DS-hv",
- "fsl,OCA4080-hv",
- "fsl,P4080DS-hv",
- "fsl,P5020DS-hv",
- "fsl,P5040DS-hv",
- "fsl,T2080QDS-hv",
- "fsl,T2081QDS-hv",
- "fsl,T4240QDS-hv",
- "fsl,T4240RDB-hv",
- "fsl,B4860QDS-hv",
- "fsl,B4420QDS-hv",
- "fsl,B4220QDS-hv",
- "fsl,T1040QDS-hv",
- "fsl,T1042QDS-hv",
- NULL
-};
-
/*
* Called very early, device-tree isn't unflattened
*/
static int __init corenet_generic_probe(void)
{
unsigned long root = of_get_flat_dt_root();
+ char hv_compat[24];
+ int i;
#ifdef CONFIG_SMP
extern struct smp_ops_t smp_85xx_ops;
#endif
return 1;
/* Check if we're running under the Freescale hypervisor */
- if (of_flat_dt_match(root, hv_boards)) {
- ppc_md.init_IRQ = ehv_pic_init;
- ppc_md.get_irq = ehv_pic_get_irq;
- ppc_md.restart = fsl_hv_restart;
- ppc_md.power_off = fsl_hv_halt;
- ppc_md.halt = fsl_hv_halt;
+ for (i = 0; boards[i]; i++) {
+ snprintf(hv_compat, sizeof(hv_compat), "%s-hv", boards[i]);
+ if (of_flat_dt_is_compatible(root, hv_compat)) {
+ ppc_md.init_IRQ = ehv_pic_init;
+
+ ppc_md.get_irq = ehv_pic_get_irq;
+ ppc_md.restart = fsl_hv_restart;
+ ppc_md.power_off = fsl_hv_halt;
+ ppc_md.halt = fsl_hv_halt;
#ifdef CONFIG_SMP
- /*
- * Disable the timebase sync operations because we can't write
- * to the timebase registers under the hypervisor.
- */
- smp_85xx_ops.give_timebase = NULL;
- smp_85xx_ops.take_timebase = NULL;
+ /*
+ * Disable the timebase sync operations because we
+ * can't write to the timebase registers under the
+ * hypervisor.
+ */
+ smp_85xx_ops.give_timebase = NULL;
+ smp_85xx_ops.take_timebase = NULL;
#endif
- return 1;
+ return 1;
+ }
}
return 0;