ARM: dts: Add EMAC AXI settings for Arria10

Add the device tree entries needed to support the EMAC AXI
bus settings on the Arria10 SoCFPGA chip.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 65904db153bec69654d932c5ecf3fd5eff7d1f33..6b0b7463f36f8bef0acc65cf2b2d32a12011f20e 100644 (file)
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -408,6 +408,12 @@
                                };
                };
 
+               socfpga_axi_setup: stmmac-axi-config {
+                       snps,wr_osr_lmt = <0xf>;
+                       snps,rd_osr_lmt = <0xf>;
+                       snps,blen = <0 0 0 0 16 0 0>;
+               };
+
                gmac0: ethernet@ff800000 {
                        compatible = "altr,socfpga-stmmac", "snps,dwmac-3.72a", "snps,dwmac";
                        altr,sysmgr-syscon = <&sysmgr 0x44 0>;
@@ -424,6 +430,7 @@
                        clock-names = "stmmaceth";
                        resets = <&rst EMAC0_RESET>;
                        reset-names = "stmmaceth";
+                       snps,axi-config = <&socfpga_axi_setup>;
                        status = "disabled";
                };
 
@@ -443,6 +450,7 @@
                        clock-names = "stmmaceth";
                        resets = <&rst EMAC1_RESET>;
                        reset-names = "stmmaceth";
+                       snps,axi-config = <&socfpga_axi_setup>;
                        status = "disabled";
                };
 
@@ -460,6 +468,7 @@
                        rx-fifo-depth = <16384>;
                        clocks = <&l4_mp_clk>;
                        clock-names = "stmmaceth";
+                       snps,axi-config = <&socfpga_axi_setup>;
                        status = "disabled";
                };