#define imx6q_add_fsl_ehci_hs(id, pdata) \
imx_add_fsl_ehci(&imx6q_mxc_ehci_hs_data[id - 1], pdata)
+extern const struct imx_mxc_ehci_data imx6sl_mxc_ehci_hs_data[] __initconst;
+#define imx6sl_add_fsl_ehci_hs(id, pdata) \
+ imx_add_fsl_ehci(&imx6sl_mxc_ehci_hs_data[id - 1], pdata)
+
extern const struct imx_fsl_usb2_otg_data imx6q_fsl_usb2_otg_data __initconst;
#define imx6q_add_fsl_usb2_otg(pdata) \
imx_add_fsl_usb2_otg(&imx6q_fsl_usb2_otg_data, pdata)
struct platform_device *pdev, *pdev_wakeup;
static void __iomem *anatop_base_addr = MX6_IO_ADDRESS(ANATOP_BASE_ADDR);
usbh1_config.wakeup_pdata = &usbh1_wakeup_config;
- pdev = imx6q_add_fsl_ehci_hs(1, &usbh1_config);
+ if (cpu_is_mx6sl())
+ pdev = imx6sl_add_fsl_ehci_hs(1, &usbh1_config);
+ else
+ pdev = imx6q_add_fsl_ehci_hs(1, &usbh1_config);
usbh1_wakeup_config.usb_pdata[0] = pdev->dev.platform_data;
pdev_wakeup = imx6q_add_fsl_usb2_hs_wakeup(1, &usbh1_wakeup_config);
((struct fsl_usb2_platform_data *)(pdev->dev.platform_data))->wakeup_pdata =
};
#endif /* ifdef CONFIG_SOC_IMX6Q */
+#ifdef CONFIG_SOC_IMX6SL
+const struct imx_mxc_ehci_data imx6sl_mxc_ehci_hs_data[] __initconst = {
+ imx_mxc_ehci_data_entry_single(MX6SL, 1, HS1),
+ imx_mxc_ehci_data_entry_single(MX6SL, 2, HS2),
+ imx_mxc_ehci_data_entry_single(MX6SL, 3, HS3),
+};
+#endif /* ifdef CONFIG_SOC_IMX6SL */
+
struct platform_device *__init imx_add_mxc_ehci(
const struct imx_mxc_ehci_data *data,
const struct mxc_usbh_platform_data *pdata)
#define MX6Q_INT_USB_HS1 72
#define MX6SL_INT_USB_HS1 74
#define MX6Q_INT_USB_HS2 73
-#define MX6SL_INT_USB_HS2 72
+#define MX6SL_INT_USB_HS2 73
#define MX6Q_INT_USB_HS3 74
-#define MX6SL_INT_USB_HS3 73
+#define MX6SL_INT_USB_HS3 72
#define MX6Q_INT_USB_OTG 75
#define MX6Q_INT_USB_PHY0 76
#define MX6Q_INT_USB_PHY1 77