ARM: l2c: add L2C-310 power control DT properties

Add two new properties for setting thte L3 power control register.  Two
new properties are added:

	arm,dynamic-clk-gating
	arm,standby-mode

iMX6 sets both these, add the properties there.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt
index b513cb8196fefd3564c09ee8b6bc60285875185a..e0dd400ecea65bd5ce2327dacc52be0cc4efb865 100644 (file)
--- a/Documentation/devicetree/bindings/arm/l2cc.txt
+++ b/Documentation/devicetree/bindings/arm/l2cc.txt
@@ -40,6 +40,8 @@ Optional properties:
 - arm,filter-ranges : <start length> Starting address and length of window to
   filter. Addresses in the filter window are directed to the M1 port. Other
   addresses will go to the M0 port.
+- arm,dynamic-clk-gating : Enables dynamic clock gating (PL310)
+- arm,standby-mode : Enables standby mode (PL310)
 - interrupts : 1 combined interrupt.
 - cache-id-part: cache id part number to be used if it is not present
   on hardware

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 55cb926fa3f7ed4fbe043587e74d57af344c7bad..1bde76683017d52f445fcf7735142c640778c47b 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -125,6 +125,8 @@
                        cache-level = <2>;
                        arm,tag-latency = <4 2 3>;
                        arm,data-latency = <4 2 3>;
+                       arm,dynamic-clk-gating;
+                       arm,standby-mode;
                };
 
                pcie: pcie@0x01000000 {

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 3cb4941afeef9ab6cb121b4271d78c522ff771f8..691832f2645330eb819c505bac768b89b150363e 100644 (file)
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -111,6 +111,8 @@
                        cache-level = <2>;
                        arm,tag-latency = <4 2 3>;
                        arm,data-latency = <4 2 3>;
+                       arm,dynamic-clk-gating;
+                       arm,standby-mode;
                };
 
                pmu {

diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 48b826e759cbe28206946100a57011125b60efaa..8a5110deb6574a120a00b6c42c25a3c660d75de6 100644 (file)
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -904,6 +904,7 @@ static void __init l2c310_of_parse(const struct device_node *np,
        u32 data[3] = { 0, 0, 0 };
        u32 tag[3] = { 0, 0, 0 };
        u32 filter[2] = { 0, 0 };
+       u32 val;
 
        of_property_read_u32_array(np, "arm,tag-latency", tag, ARRAY_SIZE(tag));
        if (tag[0] && tag[1] && tag[2])
@@ -930,6 +931,15 @@ static void __init l2c310_of_parse(const struct device_node *np,
                writel_relaxed((filter[0] & ~(SZ_1M - 1)) | L310_ADDR_FILTER_EN,
                               l2x0_base + L310_ADDR_FILTER_START);
        }
+
+       val = 0;
+       if (of_property_read_bool(np, "arm,dynamic-clk-gating"))
+               val |= L310_DYNAMIC_CLK_GATING_EN;
+       if (of_property_read_bool(np, "arm,standby-mode"))
+               val |= L310_STNDBY_MODE_EN;
+
+       if (val)
+               l2c_write_sec(val, l2x0_base, L310_POWER_CTRL);
 }
 
 static const struct l2c_init_data of_l2c310_data __initconst = {