ahci_xgene: Use correct OOB tunning parameters for APM X-Gene SoC AHCI SATA Host...

APM X-Gene SoC AHCI SATA Host controller driver requires
some correction of Phy Control OOB timing for the
COMINIT/COMWAKE parameters to correctly interoperate with
different kinds of disks.

Signed-off-by: Loc Ho <lho@apm.com>
Signed-off-by: Suman Tripathi <stripathi@apm.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
(cherry picked from commit 0185b1b787962db38fdf74e1cab9b7a2619490a1)

diff --git a/drivers/ata/ahci_xgene.c b/drivers/ata/ahci_xgene.c
index d17c1a06de4db3c5bcb4cb8fd1ab1d79ed7dd09f..1cfbdca638d2e7e6e759f355a55e411894d82eb3 100644 (file)
--- a/drivers/ata/ahci_xgene.c
+++ b/drivers/ata/ahci_xgene.c
@@ -196,11 +196,11 @@ static void xgene_ahci_set_phy_cfg(struct xgene_ahci_context *ctx, int channel)
        /* Disable fix rate */
        writel(0x0001fffe, mmio + PORTPHY1CFG);
        readl(mmio + PORTPHY1CFG); /* Force a barrier */
-       writel(0x5018461c, mmio + PORTPHY2CFG);
+       writel(0x28183219, mmio + PORTPHY2CFG);
        readl(mmio + PORTPHY2CFG); /* Force a barrier */
-       writel(0x1c081907, mmio + PORTPHY3CFG);
+       writel(0x13081008, mmio + PORTPHY3CFG);
        readl(mmio + PORTPHY3CFG); /* Force a barrier */
-       writel(0x1c080815, mmio + PORTPHY4CFG);
+       writel(0x00480815, mmio + PORTPHY4CFG);
        readl(mmio + PORTPHY4CFG); /* Force a barrier */
        /* Set window negotiation */
        val = readl(mmio + PORTPHY5CFG);