gpio/omap: remove unnecessary bit-masking for read access

Remove un-necessary bit masking. Since the register are 4 byte aligned
and readl would work as is. The 'enabled' mask is already taking care
to mask for bank width.

Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 485b6b207ef9fdffde22a74b0d343d571c28fc2f..38beccc9e655739cbd6b876d8b0dcd22bfbb8c6f 100644 (file)
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -576,9 +576,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
                enabled = _get_gpio_irqbank_mask(bank);
                isr_saved = isr = __raw_readl(isr_reg) & enabled;
 
-               if (cpu_is_omap15xx() && (bank->method == METHOD_MPUIO))
-                       isr &= 0x0000ffff;
-
                if (bank->level_mask)
                        level_mask = bank->level_mask & enabled;