ARM: EXYNOS4: Add more register addresses of CMU

These registers are crucial for PM to work properly.

Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/mach-exynos4/include/mach/regs-clock.h b/arch/arm/mach-exynos4/include/mach/regs-clock.h
index 64bdd240f88c98de7528a1e6bbc737b4f5a07b7b..d493fdb422ff35a495ab9303060612224316b734 100644 (file)
--- a/arch/arm/mach-exynos4/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-clock.h
@@ -36,7 +36,9 @@
 #define S5P_CLKSRC_TOP0                        S5P_CLKREG(0x0C210)
 #define S5P_CLKSRC_TOP1                        S5P_CLKREG(0x0C214)
 #define S5P_CLKSRC_CAM                 S5P_CLKREG(0x0C220)
+#define S5P_CLKSRC_TV                  S5P_CLKREG(0x0C224)
 #define S5P_CLKSRC_MFC                 S5P_CLKREG(0x0C228)
+#define S5P_CLKSRC_G3D                 S5P_CLKREG(0x0C22C)
 #define S5P_CLKSRC_IMAGE               S5P_CLKREG(0x0C230)
 #define S5P_CLKSRC_LCD0                        S5P_CLKREG(0x0C234)
 #define S5P_CLKSRC_LCD1                        S5P_CLKREG(0x0C238)
@@ -64,6 +66,7 @@
 #define S5P_CLKDIV_PERIL3              S5P_CLKREG(0x0C55C)
 #define S5P_CLKDIV_PERIL4              S5P_CLKREG(0x0C560)
 #define S5P_CLKDIV_PERIL5              S5P_CLKREG(0x0C564)
+#define S5P_CLKDIV2_RATIO              S5P_CLKREG(0x0C580)
 
 #define S5P_CLKSRC_MASK_TOP            S5P_CLKREG(0x0C310)
 #define S5P_CLKSRC_MASK_CAM            S5P_CLKREG(0x0C320)