]> git.karo-electronics.de Git - linux-beck.git/commitdiff
ARM: spear: make spear3xx/6xx mach/spear.h files identical
authorArnd Bergmann <arnd@arndb.de>
Sun, 2 Dec 2012 13:45:27 +0000 (14:45 +0100)
committerArnd Bergmann <arnd@arndb.de>
Tue, 12 Mar 2013 16:39:31 +0000 (17:39 +0100)
The two files are almost identical already basically just differ
in the identifier names. By changing the identifiers to be the
same, we are able to merge the two as a preparation to building
a combined kernel.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
arch/arm/mach-spear3xx/include/mach/misc_regs.h
arch/arm/mach-spear3xx/include/mach/spear.h
arch/arm/mach-spear3xx/spear300.c
arch/arm/mach-spear3xx/spear310.c
arch/arm/mach-spear3xx/spear320.c
arch/arm/mach-spear3xx/spear3xx.c
arch/arm/mach-spear6xx/include/mach/misc_regs.h
arch/arm/mach-spear6xx/include/mach/spear.h
arch/arm/mach-spear6xx/spear6xx.c

index 6309bf68d6f80d8c00aad241b3bdd6bc97ccbcf5..075812c4ca182cff60bf98fedd8895eb2789bc9f 100644 (file)
@@ -16,7 +16,7 @@
 
 #include <mach/spear.h>
 
-#define MISC_BASE              IOMEM(VA_SPEAR3XX_ICM3_MISC_REG_BASE)
+#define MISC_BASE              IOMEM(VA_SPEAR_ICM3_MISC_REG_BASE)
 #define DMA_CHN_CFG            (MISC_BASE + 0x0A0)
 
 #endif /* __MACH_MISC_REGS_H */
index 8cca95193d4d6b8058f23a26fdabb0cc08338ff5..ee5a774caae126778e2776fc3155036793ec5a00 100644 (file)
@@ -1,9 +1,8 @@
 /*
- * arch/arm/mach-spear3xx/include/mach/spear.h
+ * SPEAr3xx/6xx Machine family specific definition
  *
- * SPEAr3xx Machine family specific definition
- *
- * Copyright (C) 2009 ST Microelectronics
+ * Copyright (C) 2009,2012 ST Microelectronics
+ * Rajeev Kumar<rajeev-dlh.kumar@st.com>
  * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * warranty of any kind, whether express or implied.
  */
 
-#ifndef __MACH_SPEAR3XX_H
-#define __MACH_SPEAR3XX_H
+#ifndef __MACH_SPEAR_H
+#define __MACH_SPEAR_H
 
 #include <asm/memory.h>
 
 /* ICM1 - Low speed connection */
-#define SPEAR3XX_ICM1_2_BASE           UL(0xD0000000)
-#define VA_SPEAR3XX_ICM1_2_BASE                UL(0xFD000000)
-#define SPEAR3XX_ICM1_UART_BASE                UL(0xD0000000)
-#define VA_SPEAR3XX_ICM1_UART_BASE     (VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE)
+#define SPEAR_ICM1_2_BASE              UL(0xD0000000)
+#define VA_SPEAR_ICM1_2_BASE           UL(0xFD000000)
+#define SPEAR_ICM1_UART_BASE           UL(0xD0000000)
+#define VA_SPEAR_ICM1_UART_BASE                (VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE)
 #define SPEAR3XX_ICM1_SSP_BASE         UL(0xD0100000)
 
-/* ML1 - Multi Layer CPU Subsystem */
-#define SPEAR3XX_ICM3_ML1_2_BASE       UL(0xF0000000)
+/* ML-1, 2 - Multi Layer CPU Subsystem */
+#define SPEAR_ICM3_ML1_2_BASE          UL(0xF0000000)
 #define VA_SPEAR6XX_ML_CPU_BASE                UL(0xF0000000)
 
 /* ICM3 - Basic Subsystem */
-#define SPEAR3XX_ICM3_SMI_CTRL_BASE    UL(0xFC000000)
-#define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
-#define SPEAR3XX_ICM3_DMA_BASE         UL(0xFC400000)
-#define SPEAR3XX_ICM3_SYS_CTRL_BASE    UL(0xFCA00000)
-#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE)
-#define SPEAR3XX_ICM3_MISC_REG_BASE    UL(0xFCA80000)
-#define VA_SPEAR3XX_ICM3_MISC_REG_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE)
+#define SPEAR_ICM3_SMI_CTRL_BASE       UL(0xFC000000)
+#define VA_SPEAR_ICM3_SMI_CTRL_BASE    UL(0xFC000000)
+#define SPEAR_ICM3_DMA_BASE            UL(0xFC400000)
+#define SPEAR_ICM3_SYS_CTRL_BASE       UL(0xFCA00000)
+#define VA_SPEAR_ICM3_SYS_CTRL_BASE    (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE)
+#define SPEAR_ICM3_MISC_REG_BASE       UL(0xFCA80000)
+#define VA_SPEAR_ICM3_MISC_REG_BASE    (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE)
 
 /* Debug uart for linux, will be used for debug and uncompress messages */
-#define SPEAR_DBG_UART_BASE            SPEAR3XX_ICM1_UART_BASE
-#define VA_SPEAR_DBG_UART_BASE         VA_SPEAR3XX_ICM1_UART_BASE
+#define SPEAR_DBG_UART_BASE            SPEAR_ICM1_UART_BASE
+#define VA_SPEAR_DBG_UART_BASE         VA_SPEAR_ICM1_UART_BASE
 
 /* Sysctl base for spear platform */
-#define SPEAR_SYS_CTRL_BASE            SPEAR3XX_ICM3_SYS_CTRL_BASE
-#define VA_SPEAR_SYS_CTRL_BASE         VA_SPEAR3XX_ICM3_SYS_CTRL_BASE
+#define SPEAR_SYS_CTRL_BASE            SPEAR_ICM3_SYS_CTRL_BASE
+#define VA_SPEAR_SYS_CTRL_BASE         VA_SPEAR_ICM3_SYS_CTRL_BASE
 
 /* SPEAr320 Macros */
 #define SPEAR320_SOC_CONFIG_BASE       UL(0xB3000000)
@@ -57,4 +56,4 @@
        #define SPEAR320_UART6_PCLK_SHIFT               12
        #define SPEAR320_RS485_PCLK_SHIFT               13
 
-#endif /* __MACH_SPEAR3XX_H */
+#endif /* __MACH_SPEAR_H */
index bbc9b7e9c62c39bca8753f225a5ecb450783a6a6..72449eeaa6ae94e7ce42c5784bfc28a1e8905df8 100644 (file)
@@ -185,7 +185,7 @@ struct pl08x_channel_data spear300_dma_info[] = {
 static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
                        &pl022_plat_data),
-       OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
+       OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
                        &pl080_plat_data),
        {}
 };
index c13a434a81959309b59f0ce3919f2704aa371063..0b7962d2769496357004a6a0c2400216a50bde9f 100644 (file)
@@ -217,7 +217,7 @@ static struct amba_pl011_data spear310_uart_data[] = {
 static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
                        &pl022_plat_data),
-       OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
+       OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
                        &pl080_plat_data),
        OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL,
                        &spear310_uart_data[0]),
index f671a0ad52175e9a681566b709e0fa2e5fe77605..e9db7dbf6c57c2c8a002cbf14c441caa3d5a143a 100644 (file)
@@ -223,7 +223,7 @@ static struct amba_pl011_data spear320_uart_data[] = {
 static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
                        &pl022_plat_data),
-       OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
+       OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
                        &pl080_plat_data),
        OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL,
                        &spear320_ssp_data[0]),
index 72e3ae7d463a718c1ece2a276c49663fb90003c5..d7580f2e5e07c34751e3bd4583ff9f0ae3f17815 100644 (file)
@@ -67,13 +67,13 @@ struct pl08x_platform_data pl080_plat_data = {
  */
 struct map_desc spear3xx_io_desc[] __initdata = {
        {
-               .virtual        = VA_SPEAR3XX_ICM1_2_BASE,
-               .pfn            = __phys_to_pfn(SPEAR3XX_ICM1_2_BASE),
+               .virtual        = VA_SPEAR_ICM1_2_BASE,
+               .pfn            = __phys_to_pfn(SPEAR_ICM1_2_BASE),
                .length         = SZ_16M,
                .type           = MT_DEVICE
        }, {
-               .virtual        = VA_SPEAR3XX_ICM3_SMI_CTRL_BASE,
-               .pfn            = __phys_to_pfn(SPEAR3XX_ICM3_SMI_CTRL_BASE),
+               .virtual        = VA_SPEAR_ICM3_SMI_CTRL_BASE,
+               .pfn            = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
                .length         = SZ_16M,
                .type           = MT_DEVICE
        },
index c34acc201d3463fc39fcff6d410a34f9b3e0d42b..28aa508cb94d248b865b1db190a81fa3bfc22b33 100644 (file)
@@ -16,7 +16,7 @@
 
 #include <mach/spear.h>
 
-#define MISC_BASE              IOMEM(VA_SPEAR6XX_ICM3_MISC_REG_BASE)
+#define MISC_BASE              IOMEM(VA_SPEAR_ICM3_MISC_REG_BASE)
 #define DMA_CHN_CFG            (MISC_BASE + 0x0A0)
 
 #endif /* __MACH_MISC_REGS_H */
index cb8ed2f4dc85fd5db84df13fceb674664304c6cf..ee5a774caae126778e2776fc3155036793ec5a00 100644 (file)
@@ -1,46 +1,59 @@
 /*
- * arch/arm/mach-spear6xx/include/mach/spear.h
+ * SPEAr3xx/6xx Machine family specific definition
  *
- * SPEAr6xx Machine family specific definition
- *
- * Copyright (C) 2009 ST Microelectronics
+ * Copyright (C) 2009,2012 ST Microelectronics
  * Rajeev Kumar<rajeev-dlh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
  *
  * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
 
-#ifndef __MACH_SPEAR6XX_H
-#define __MACH_SPEAR6XX_H
+#ifndef __MACH_SPEAR_H
+#define __MACH_SPEAR_H
 
 #include <asm/memory.h>
 
 /* ICM1 - Low speed connection */
-#define SPEAR6XX_ICM1_BASE             UL(0xD0000000)
-#define VA_SPEAR6XX_ICM1_BASE          UL(0xFD000000)
-#define SPEAR6XX_ICM1_UART0_BASE       UL(0xD0000000)
-#define VA_SPEAR6XX_ICM1_UART0_BASE    (VA_SPEAR6XX_ICM1_2_BASE | SPEAR6XX_ICM1_UART0_BASE)
+#define SPEAR_ICM1_2_BASE              UL(0xD0000000)
+#define VA_SPEAR_ICM1_2_BASE           UL(0xFD000000)
+#define SPEAR_ICM1_UART_BASE           UL(0xD0000000)
+#define VA_SPEAR_ICM1_UART_BASE                (VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE)
+#define SPEAR3XX_ICM1_SSP_BASE         UL(0xD0100000)
 
 /* ML-1, 2 - Multi Layer CPU Subsystem */
-#define SPEAR6XX_ML_CPU_BASE           UL(0xF0000000)
+#define SPEAR_ICM3_ML1_2_BASE          UL(0xF0000000)
 #define VA_SPEAR6XX_ML_CPU_BASE                UL(0xF0000000)
 
 /* ICM3 - Basic Subsystem */
-#define SPEAR6XX_ICM3_SMI_CTRL_BASE    UL(0xFC000000)
-#define VA_SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
-#define SPEAR6XX_ICM3_DMA_BASE         UL(0xFC400000)
-#define SPEAR6XX_ICM3_SYS_CTRL_BASE    UL(0xFCA00000)
-#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_SYS_CTRL_BASE)
-#define SPEAR6XX_ICM3_MISC_REG_BASE    UL(0xFCA80000)
-#define VA_SPEAR6XX_ICM3_MISC_REG_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_MISC_REG_BASE)
+#define SPEAR_ICM3_SMI_CTRL_BASE       UL(0xFC000000)
+#define VA_SPEAR_ICM3_SMI_CTRL_BASE    UL(0xFC000000)
+#define SPEAR_ICM3_DMA_BASE            UL(0xFC400000)
+#define SPEAR_ICM3_SYS_CTRL_BASE       UL(0xFCA00000)
+#define VA_SPEAR_ICM3_SYS_CTRL_BASE    (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE)
+#define SPEAR_ICM3_MISC_REG_BASE       UL(0xFCA80000)
+#define VA_SPEAR_ICM3_MISC_REG_BASE    (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE)
 
 /* Debug uart for linux, will be used for debug and uncompress messages */
-#define SPEAR_DBG_UART_BASE            SPEAR6XX_ICM1_UART0_BASE
-#define VA_SPEAR_DBG_UART_BASE         VA_SPEAR6XX_ICM1_UART0_BASE
+#define SPEAR_DBG_UART_BASE            SPEAR_ICM1_UART_BASE
+#define VA_SPEAR_DBG_UART_BASE         VA_SPEAR_ICM1_UART_BASE
 
 /* Sysctl base for spear platform */
-#define SPEAR_SYS_CTRL_BASE            SPEAR6XX_ICM3_SYS_CTRL_BASE
-#define VA_SPEAR_SYS_CTRL_BASE         VA_SPEAR6XX_ICM3_SYS_CTRL_BASE
-
-#endif /* __MACH_SPEAR6XX_H */
+#define SPEAR_SYS_CTRL_BASE            SPEAR_ICM3_SYS_CTRL_BASE
+#define VA_SPEAR_SYS_CTRL_BASE         VA_SPEAR_ICM3_SYS_CTRL_BASE
+
+/* SPEAr320 Macros */
+#define SPEAR320_SOC_CONFIG_BASE       UL(0xB3000000)
+#define VA_SPEAR320_SOC_CONFIG_BASE    UL(0xFE000000)
+#define SPEAR320_CONTROL_REG           IOMEM(VA_SPEAR320_SOC_CONFIG_BASE)
+#define SPEAR320_EXT_CTRL_REG          IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018)
+       #define SPEAR320_UARTX_PCLK_MASK                0x1
+       #define SPEAR320_UART2_PCLK_SHIFT               8
+       #define SPEAR320_UART3_PCLK_SHIFT               9
+       #define SPEAR320_UART4_PCLK_SHIFT               10
+       #define SPEAR320_UART5_PCLK_SHIFT               11
+       #define SPEAR320_UART6_PCLK_SHIFT               12
+       #define SPEAR320_RS485_PCLK_SHIFT               13
+
+#endif /* __MACH_SPEAR_H */
index 8904d8a52d8486b9b8023c4b49b7846dfd6f99a0..97fb31d8c9b57a5e29146672b24f784673c932ba 100644 (file)
@@ -351,17 +351,17 @@ struct pl08x_platform_data pl080_plat_data = {
 struct map_desc spear6xx_io_desc[] __initdata = {
        {
                .virtual        = VA_SPEAR6XX_ML_CPU_BASE,
-               .pfn            = __phys_to_pfn(SPEAR6XX_ML_CPU_BASE),
+               .pfn            = __phys_to_pfn(SPEAR_ICM3_ML1_2_BASE),
                .length         = 2 * SZ_16M,
                .type           = MT_DEVICE
        },      {
-               .virtual        = VA_SPEAR6XX_ICM1_BASE,
-               .pfn            = __phys_to_pfn(SPEAR6XX_ICM1_BASE),
+               .virtual        = VA_SPEAR_ICM1_2_BASE,
+               .pfn            = __phys_to_pfn(SPEAR_ICM1_2_BASE),
                .length         = SZ_16M,
                .type           = MT_DEVICE
        }, {
-               .virtual        = VA_SPEAR6XX_ICM3_SMI_CTRL_BASE,
-               .pfn            = __phys_to_pfn(SPEAR6XX_ICM3_SMI_CTRL_BASE),
+               .virtual        = VA_SPEAR_ICM3_SMI_CTRL_BASE,
+               .pfn            = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
                .length         = SZ_16M,
                .type           = MT_DEVICE
        },
@@ -404,7 +404,7 @@ void __init spear6xx_timer_init(void)
 
 /* Add auxdata to pass platform data */
 struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = {
-       OF_DEV_AUXDATA("arm,pl080", SPEAR6XX_ICM3_DMA_BASE, NULL,
+       OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
                        &pl080_plat_data),
        {}
 };