ARM i.MX5: fix obvious typo in ldb_di0_gate clk definition

ldb_di0_gate is registerd with the clk index of IMX5_CLK_LDB_DI1_GATE,
thus the DI0 interface will be turned off inadvertently during boot.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index dff5ca921d001f128df9c27621a626c1e4b02aa0..19fca1fdc6feb76f0e86805ec7d5c980b716c515 100644 (file)
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -514,7 +514,7 @@ static void __init mx53_clocks_init(struct device_node *np)
        clk[IMX5_CLK_LDB_DI0_DIV]       = imx_clk_divider_flags("ldb_di0_div", "ldb_di0_div_3_5", MXC_CCM_CSCMR2, 10, 1, 0);
        clk[IMX5_CLK_LDB_DI0_SEL]       = imx_clk_mux_flags("ldb_di0_sel", MXC_CCM_CSCMR2, 8, 1,
                                                mx53_ldb_di0_sel, ARRAY_SIZE(mx53_ldb_di0_sel), CLK_SET_RATE_PARENT);
-       clk[IMX5_CLK_LDB_DI1_GATE]      = imx_clk_gate2("ldb_di0_gate", "ldb_di0_div", MXC_CCM_CCGR6, 28);
+       clk[IMX5_CLK_LDB_DI0_GATE]      = imx_clk_gate2("ldb_di0_gate", "ldb_di0_div", MXC_CCM_CCGR6, 28);
        clk[IMX5_CLK_LDB_DI1_GATE]      = imx_clk_gate2("ldb_di1_gate", "ldb_di1_div", MXC_CCM_CCGR6, 30);
        clk[IMX5_CLK_IPU_DI0_SEL]       = imx_clk_mux("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,
                                                mx53_ipu_di0_sel, ARRAY_SIZE(mx53_ipu_di0_sel));