arm64: dts: apm: Add APM X-Gene v2 SoC PMU DTS entries

This patch adds APM X-Gene v2 SoC PMU DTS entries.

Signed-off-by: Duc Dang <dhdang@apm.com>
Cc: Tai Nguyen <ttnguyen@apm.com>

diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
index 1425ed41620c42b024edaec35bb0ccc3588a68c2..3b72ed66adbc631bc825b89354f726b82b299cda 100644 (file)
--- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
@@ -453,6 +453,64 @@
                        };
                };
 
+               pmu: pmu@78810000 {
+                       compatible = "apm,xgene-pmu-v2";
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       ranges;
+                       regmap-csw = <&csw>;
+                       regmap-mcba = <&mcba>;
+                       regmap-mcbb = <&mcbb>;
+                       reg = <0x0 0x78810000 0x0 0x1000>;
+                       interrupts = <0x0 0x22 0x4>;
+
+                       pmul3c@7e610000 {
+                               compatible = "apm,xgene-pmu-l3c";
+                               reg = <0x0 0x7e610000 0x0 0x1000>;
+                       };
+
+                       pmuiob@7e940000 {
+                               compatible = "apm,xgene-pmu-iob";
+                               reg = <0x0 0x7e940000 0x0 0x1000>;
+                       };
+
+                       pmucmcb@7e710000 {
+                               compatible = "apm,xgene-pmu-mcb";
+                               reg = <0x0 0x7e710000 0x0 0x1000>;
+                               enable-bit-index = <0>;
+                       };
+
+                       pmucmcb@7e730000 {
+                               compatible = "apm,xgene-pmu-mcb";
+                               reg = <0x0 0x7e730000 0x0 0x1000>;
+                               enable-bit-index = <1>;
+                       };
+
+                       pmucmc@7e810000 {
+                               compatible = "apm,xgene-pmu-mc";
+                               reg = <0x0 0x7e810000 0x0 0x1000>;
+                               enable-bit-index = <0>;
+                       };
+
+                       pmucmc@7e850000 {
+                               compatible = "apm,xgene-pmu-mc";
+                               reg = <0x0 0x7e850000 0x0 0x1000>;
+                               enable-bit-index = <1>;
+                       };
+
+                       pmucmc@7e890000 {
+                               compatible = "apm,xgene-pmu-mc";
+                               reg = <0x0 0x7e890000 0x0 0x1000>;
+                               enable-bit-index = <2>;
+                       };
+
+                       pmucmc@7e8d0000 {
+                               compatible = "apm,xgene-pmu-mc";
+                               reg = <0x0 0x7e8d0000 0x0 0x1000>;
+                               enable-bit-index = <3>;
+                       };
+               };
+
                mailbox: mailbox@10540000 {
                        compatible = "apm,xgene-slimpro-mbox";
                        reg = <0x0 0x10540000 0x0 0x8000>;