ARM: l2c: add decode for L2C-220 cache ways

Rather than assuming these are always 8-way, it can be decoded from the
auxillary register in the same manner as L2C-210.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index b4dd2f4b491b7d32385fbda3dd80a1ef536b4067..69a18316b23936af48f1beaaaa7ee95f75375c3e 100644 (file)
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -701,6 +701,7 @@ static void __init __l2c_init(const struct l2c_init_data *data,
                break;
 
        case L2X0_CACHE_ID_PART_L210:
+       case L2X0_CACHE_ID_PART_L220:
                ways = (aux >> 13) & 0xf;
                break;