}
/**
- * sh7722_find_divisors - find divisor for setting rate
+ * sh7722_find_div_index - find divisor for setting rate
*
* All sh7722 clocks use the same set of multipliers/divisors. This function
* chooses correct divisor to set the rate of clock with parent clock that
* @parent_rate: rate of parent clock
* @rate: requested rate to be set
*/
-static int sh7722_find_divisors(unsigned long parent_rate, unsigned rate)
+static int sh7722_find_div_index(unsigned long parent_rate, unsigned rate)
{
unsigned div2 = parent_rate * 2 / rate;
int index;
return -EINVAL;
for (index = 1; index < ARRAY_SIZE(divisors2); index++) {
- if (div2 > divisors2[index] && div2 <= divisors2[index])
+ if (div2 > divisors2[index - 1] && div2 <= divisors2[index])
break;
}
if (index >= ARRAY_SIZE(divisors2))
index = ARRAY_SIZE(divisors2) - 1;
- return divisors2[index];
+ return index;
}
static void sh7722_frqcr_recalc(struct clk *clk)
return -EINVAL;
/* look for multiplier/divisor pair */
- div = sh7722_find_divisors(parent_rate, rate);
+ div = sh7722_find_div_index(parent_rate, rate);
if (div<0)
return div;
/* calculate new value of clock rate */
- clk->rate = parent_rate * 2 / div;
+ clk->rate = parent_rate * 2 / divisors2[div];
frqcr = ctrl_inl(FRQCR);
/* FIXME: adjust as algo_id specifies */
int part_div;
if (likely(!err)) {
- part_div = sh7722_find_divisors(parent_rate,
+ part_div = sh7722_find_div_index(parent_rate,
rate);
if (part_div > 0) {
part_ctx = sh7722_get_clk_context(
int div;
/* look for multiplier/divisor pair */
- div = sh7722_find_divisors(parent_rate, rate);
+ div = sh7722_find_div_index(parent_rate, rate);
if (div < 0)
return clk->rate;
/* calculate new value of clock rate */
- return parent_rate * 2 / div;
+ return parent_rate * 2 / divisors2[div];
}
static struct clk_ops sh7722_frqcr_clk_ops = {
int div;
r = ctrl_inl(clk->arch_flags);
- div = sh7722_find_divisors(clk->parent->rate, rate);
+ div = sh7722_find_div_index(clk->parent->rate, rate);
if (div < 0)
return div;
r = (r & ~0xF) | div;