ARM: dts: rockchip: add vop device node for rk3036

The rk3036 support two overlay plane and one hwc plane,
it supports IOMMU, and its IOMMU same as rk3288's.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index d0f4bb7e1e50a4d44aea72b1160c3dc8e739f641..4932abf2a78401f02526fd39096a5684d93927cb 100644 (file)
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -119,6 +119,11 @@
                interrupt-affinity = <&cpu0>, <&cpu1>;
        };
 
+       display-subsystem {
+               compatible = "rockchip,display-subsystem";
+               ports = <&vop_out>;
+       };
+
        timer {
                compatible = "arm,armv7-timer";
                arm,cpu-registers-not-fw-configured;
@@ -149,6 +154,32 @@
                };
        };
 
+       vop: vop@10118000 {
+               compatible = "rockchip,rk3036-vop";
+               reg = <0x10118000 0x19c>;
+               interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru ACLK_LCDC>, <&cru SCLK_LCDC>, <&cru HCLK_LCDC>;
+               clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+               resets = <&cru SRST_LCDC1_A>, <&cru SRST_LCDC1_H>, <&cru SRST_LCDC1_D>;
+               reset-names = "axi", "ahb", "dclk";
+               iommus = <&vop_mmu>;
+               status = "disabled";
+
+               vop_out: port {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+
+       vop_mmu: iommu@10118300 {
+               compatible = "rockchip,iommu";
+               reg = <0x10118300 0x100>;
+               interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vop_mmu";
+               #iommu-cells = <0>;
+               status = "disabled";
+       };
+
        gic: interrupt-controller@10139000 {
                compatible = "arm,gic-400";
                interrupt-controller;