]> git.karo-electronics.de Git - linux-beck.git/commitdiff
selftests/powerpc: Standardise TM calls
authorRashmica Gupta <rashmicy@gmail.com>
Wed, 23 Dec 2015 05:49:51 +0000 (16:49 +1100)
committerMichael Ellerman <mpe@ellerman.id.au>
Wed, 11 May 2016 11:54:12 +0000 (21:54 +1000)
Currently tbegin, tend etc are written as opcodes or asm instructions. So
standardise these to asm instructions.

Signed-off-by: Rashmica Gupta <rashmicy@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
tools/testing/selftests/powerpc/tm/tm-resched-dscr.c
tools/testing/selftests/powerpc/tm/tm-signal-stack.c

index 8fde93d6021f67986a931a30e0409f3bb95f5b70..d9c49f41515e704994ed1669dbe0a859a6dadd79 100644 (file)
 #include "utils.h"
 #include "tm.h"
 
-#define TBEGIN          ".long 0x7C00051D ;"
-#define TEND            ".long 0x7C00055D ;"
-#define TCHECK          ".long 0x7C00059C ;"
-#define TSUSPEND        ".long 0x7C0005DD ;"
-#define TRESUME         ".long 0x7C2005DD ;"
-#define SPRN_TEXASR     0x82
 #define SPRN_DSCR       0x03
 
 int test_body(void)
@@ -55,13 +49,13 @@ int test_body(void)
                        "mtspr   %[sprn_dscr], 3;"
 
                        /* start and suspend a transaction */
-                       TBEGIN
+                       "tbegin.;"
                        "beq     1f;"
-                       TSUSPEND
+                       "tsuspend.;"
 
                        /* hard loop until the transaction becomes doomed */
                        "2: ;"
-                       TCHECK
+                       "tcheck 0;"
                        "bc      4, 0, 2b;"
 
                        /* record DSCR and TEXASR */
@@ -70,8 +64,8 @@ int test_body(void)
                        "mfspr   3, %[sprn_texasr];"
                        "std     3, %[texasr];"
 
-                       TRESUME
-                       TEND
+                       "tresume.;"
+                       "tend.;"
                        "li      %[rv], 0;"
                        "1: ;"
                        : [rv]"=r"(rv), [dscr2]"=m"(dscr2), [texasr]"=m"(texasr)
index e44a238c1d77800d2753934cac00c48208922da6..1f0eb567438da09ba6b23eca5d21e863ae2a3019 100644 (file)
@@ -60,9 +60,9 @@ int tm_signal_stack()
                exit(1);
        asm volatile("li 1, 0 ;"                /* stack ptr == NULL */
                     "1:"
-                    ".long 0x7C00051D ;"       /* tbegin */
+                    "tbegin.;"
                     "beq 1b ;"                 /* retry forever */
-                    ".long 0x7C0005DD ; ;"     /* tsuspend */
+                    "tsuspend.;"
                     "ld 2, 0(1) ;"             /* trigger segv" */
                     : : : "memory");