ENGR00238439 ASRC: add delay before reading ASRC FIFO status

ASRC driver would read the sample number of ASRC output FIFO to fetch
the data from ASRC output FIFO. However, SDMA's fetching operation may
not finished before ASRC's reading. In this case, ASRC driver may read a
error data from the register.

In this patch, add delay before reading ASRC FIFO status to prevent
noise.

Signed-off-by: Chen Liangjun <b36089@freescale.com>

diff --git a/drivers/mxc/asrc/mxc_asrc.c b/drivers/mxc/asrc/mxc_asrc.c
index 9962698473af9928b9c438cac473d13f5d8fa16c..8746bcc766ad1dbdb6d52da5733b9609343a3de9 100644 (file)
--- a/drivers/mxc/asrc/mxc_asrc.c
+++ b/drivers/mxc/asrc/mxc_asrc.c
@@ -946,6 +946,7 @@ static void asrc_read_output_FIFO_S16(struct asrc_pair_params *params)
        u16 *index = params->output_last_period.dma_vaddr;
 
        t_size = 0;
+       udelay(100);
        size = asrc_get_output_FIFO_size(params->index);
        while (size) {
                for (i = 0; i < size; i++) {
@@ -972,6 +973,7 @@ static void asrc_read_output_FIFO_S24(struct asrc_pair_params *params)
        u32 *index = params->output_last_period.dma_vaddr;
 
        t_size = 0;
+       udelay(100);
        size = asrc_get_output_FIFO_size(params->index);
        while (size) {
                for (i = 0; i < size; i++) {