]> git.karo-electronics.de Git - linux-beck.git/commitdiff
ath9k_hw: Read and configure turnning caps to regulate freq accuracy
authorVasanthakumar Thiagarajan <vasanth@atheros.com>
Mon, 6 Dec 2010 12:27:52 +0000 (04:27 -0800)
committerJohn W. Linville <linville@tuxdriver.com>
Tue, 7 Dec 2010 21:34:58 +0000 (16:34 -0500)
Right now it is done for only AR9485, will be done for ar9003 also
after proper testing.

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
drivers/net/wireless/ath/ath9k/ar9003_phy.h

index c02e43d5c9c93e9cc015a9edbb2e20ee921ecd15..76508f82f8594e3459fcb64963a8a8f036e206ae 100644 (file)
@@ -3737,6 +3737,20 @@ static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
 
 }
 
+static void ar9003_hw_apply_tuning_caps(struct ath_hw *ah)
+{
+       struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+       u8 tuning_caps_param = eep->baseEepHeader.params_for_tuning_caps[0];
+
+       if (eep->baseEepHeader.featureEnable & 0x40) {
+               tuning_caps_param &= 0x7f;
+               REG_RMW_FIELD(ah, AR_CH0_XTAL, AR_CH0_XTAL_CAPINDAC,
+                             tuning_caps_param);
+               REG_RMW_FIELD(ah, AR_CH0_XTAL, AR_CH0_XTAL_CAPOUTDAC,
+                             tuning_caps_param);
+       }
+}
+
 static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
                                             struct ath9k_channel *chan)
 {
@@ -3745,6 +3759,8 @@ static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
        ar9003_hw_drive_strength_apply(ah);
        ar9003_hw_atten_apply(ah, chan);
        ar9003_hw_internal_regulator_apply(ah);
+       if (AR_SREV_9485(ah))
+               ar9003_hw_apply_tuning_caps(ah);
 }
 
 static void ath9k_hw_ar9300_set_addac(struct ath_hw *ah,
index 8de3ffd5a92b7cab361cab7d4efc11733036c077..4c64eb1888a2e1e988fa02b3a5c9199687b314fc 100644 (file)
 #define AR_CH0_TOP2_XPABIASLVL         0xf000
 #define AR_CH0_TOP2_XPABIASLVL_S       12
 
+#define AR_CH0_XTAL            (AR_SREV_9485(ah) ? 0x16290 : 0x16294)
+#define AR_CH0_XTAL_CAPINDAC   0x7f000000
+#define AR_CH0_XTAL_CAPINDAC_S 24
+#define AR_CH0_XTAL_CAPOUTDAC  0x00fe0000
+#define AR_CH0_XTAL_CAPOUTDAC_S        17
+
 #define AR_PHY_PMU1            0x16c40
 #define AR_PHY_PMU1_PWD                0x1
 #define AR_PHY_PMU1_PWD_S      0