struct cpu_hw_events *cpuc;
int bit, loops;
u64 status;
+ int handled = 0;
perf_sample_data_init(&data, 0);
/*
* PEBS overflow sets bit 62 in the global status register
*/
- if (__test_and_clear_bit(62, (unsigned long *)&status))
+ if (__test_and_clear_bit(62, (unsigned long *)&status)) {
+ handled++;
x86_pmu.drain_pebs(regs);
+ }
for_each_set_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
struct perf_event *event = cpuc->events[bit];
+ handled++;
+
if (!test_bit(bit, cpuc->active_mask))
continue;
done:
intel_pmu_enable_all(0);
- return 1;
+ return handled;
}
static struct event_constraint *