vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->byBBRxConf);
}
-void BBvSetVGAGainOffset(struct vnt_private *priv, u8 data)
+void vnt_set_vga_gain_offset(struct vnt_private *priv, u8 data)
{
vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xE7, data);
u16 tx_rate, u8 pkt_type, struct vnt_phy_field *);
void vnt_set_short_slot_time(struct vnt_private *);
-void BBvSetVGAGainOffset(struct vnt_private *, u8 byData);
+void vnt_set_vga_gain_offset(struct vnt_private *, u8);
void vnt_set_antenna_mode(struct vnt_private *, u8);
int vnt_vt3184_init(struct vnt_private *);
void BBvSetDeepSleep(struct vnt_private *);
priv->abyBBVGA[3] = 0x0;
}
- BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
+ vnt_set_vga_gain_offset(priv, priv->abyBBVGA[0]);
}
priv->bShortSlotTime = false;
vnt_set_short_slot_time(priv);
- BBvSetVGAGainOffset(priv, priv->abyBBVGA[0]);
+ vnt_set_vga_gain_offset(priv, priv->abyBBVGA[0]);
BBvUpdatePreEDThreshold(priv, false);
}