outw(1 << chan, dev->iobase + PCI224_DACCEN);
/* Set range and reset FIFO. */
devpriv->daccon = COMBINE(devpriv->daccon, devpriv->hwrange[range],
- (PCI224_DACCON_POLAR_MASK |
- PCI224_DACCON_VREF_MASK));
+ PCI224_DACCON_POLAR_MASK |
+ PCI224_DACCON_VREF_MASK);
outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
dev->iobase + PCI224_DACCON);
/*
__func__);
return -EINVAL;
}
- chan_mask |= (1 << chan);
+ chan_mask |= 1 << chan;
if (range != range0) {
dev_dbg(dev->class_dev,
* N.B. DAC FIFO interrupts are currently disabled.
*/
devpriv->daccon = COMBINE(devpriv->daccon,
- (devpriv->
- hwrange[range] | PCI224_DACCON_TRIG_NONE |
- PCI224_DACCON_FIFOINTR_NHALF),
- (PCI224_DACCON_POLAR_MASK |
- PCI224_DACCON_VREF_MASK |
- PCI224_DACCON_TRIG_MASK |
- PCI224_DACCON_FIFOINTR_MASK));
+ devpriv->hwrange[range] |
+ PCI224_DACCON_TRIG_NONE |
+ PCI224_DACCON_FIFOINTR_NHALF,
+ PCI224_DACCON_POLAR_MASK |
+ PCI224_DACCON_VREF_MASK |
+ PCI224_DACCON_TRIG_MASK |
+ PCI224_DACCON_FIFOINTR_MASK);
outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
dev->iobase + PCI224_DACCON);
outw(PCI224_DACCON_GLOBALRESET, dev->iobase + PCI224_DACCON);
outw(0, dev->iobase + PCI224_DACCEN);
outw(0, dev->iobase + PCI224_FIFOSIZ);
- devpriv->daccon = (PCI224_DACCON_TRIG_SW | PCI224_DACCON_POLAR_BI |
- PCI224_DACCON_FIFOENAB |
- PCI224_DACCON_FIFOINTR_EMPTY);
+ devpriv->daccon = PCI224_DACCON_TRIG_SW | PCI224_DACCON_POLAR_BI |
+ PCI224_DACCON_FIFOENAB | PCI224_DACCON_FIFOINTR_EMPTY;
outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
dev->iobase + PCI224_DACCON);