There are two couples register for HDMI PHY interrupt/mask:
HDMI_FC_INT2, HDMI_FC_MASK2 and HDMI_IH_FC_STAT2, HDMI_IH_MUTE_FC_STAT2.
The register can not mixed use it, otherwise the interrupt will missing
and not clean.
Mask interrupt with HDMI_IH_MUTE_FC_STAT2 so check interrupt
should use register HDMI_IH_FC_STAT2.
Signed-off-by: Sandor Yu <R01008@freescale.com>
phy_int_mask &= ~HDMI_PHY_HPD;
hdmi_writeb(phy_int_mask, HDMI_PHY_MASK0);
- if (hdmi_readb(HDMI_FC_INT2) & HDMI_FC_INT2_OVERFLOW_MASK)
+ if (hdmi_readb(HDMI_IH_FC_STAT2) & HDMI_IH_FC_STAT2_OVERFLOW_MASK)
mxc_hdmi_clear_overflow();
/* We keep the iahb clock enabled only if we are plugged in. */
*/
ret = hdmi_irq_disable(irq);
if (ret == IRQ_DISABLE_FAIL) {
- if (hdmi_readb(HDMI_FC_INT2) & HDMI_FC_INT2_OVERFLOW_MASK) {
+ if (hdmi_readb(HDMI_IH_FC_STAT2) &
+ HDMI_IH_FC_STAT2_OVERFLOW_MASK) {
mxc_hdmi_clear_overflow();
/* clear irq status */