crypto: ccp - Enable use of the additional CCP

A second CCP is available, identical to the first, with
its ownn PCI ID. Make it available for use by the crypto
subsystem, as well as for DMA activity and random
number generation.

This device is not pre-configured at at boot time. The
driver must configure it (during the probe) for use.

Signed-off-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/drivers/crypto/ccp/ccp-dev-v5.c
index 40867141aea8e2a8e2d472eeaeac0544c34b7688..f499e34df389887052e410de88cff3e9425635d1 100644 (file)
--- a/drivers/crypto/ccp/ccp-dev-v5.c
+++ b/drivers/crypto/ccp/ccp-dev-v5.c
@@ -835,7 +835,7 @@ static int ccp5_init(struct ccp_device *ccp)
        /* Register the DMA engine support */
        ret = ccp_dmaengine_register(ccp);
        if (ret)
-               goto e_hwrng;
+               goto e_kthread;
 
        return 0;
 
@@ -952,6 +952,33 @@ static void ccp5_config(struct ccp_device *ccp)
        iowrite32(0x00001249, ccp->io_regs + CMD5_REQID_CONFIG_OFFSET);
 }
 
+static void ccp5other_config(struct ccp_device *ccp)
+{
+       int i;
+       u32 rnd;
+
+       /* We own all of the queues on the NTB CCP */
+
+       iowrite32(0x00012D57, ccp->io_regs + CMD5_TRNG_CTL_OFFSET);
+       iowrite32(0x00000003, ccp->io_regs + CMD5_CONFIG_0_OFFSET);
+       for (i = 0; i < 12; i++) {
+               rnd = ioread32(ccp->io_regs + TRNG_OUT_REG);
+               iowrite32(rnd, ccp->io_regs + CMD5_AES_MASK_OFFSET);
+       }
+
+       iowrite32(0x0000001F, ccp->io_regs + CMD5_QUEUE_MASK_OFFSET);
+       iowrite32(0x00005B6D, ccp->io_regs + CMD5_QUEUE_PRIO_OFFSET);
+       iowrite32(0x00000000, ccp->io_regs + CMD5_CMD_TIMEOUT_OFFSET);
+
+       iowrite32(0x3FFFFFFF, ccp->io_regs + LSB_PRIVATE_MASK_LO_OFFSET);
+       iowrite32(0x000003FF, ccp->io_regs + LSB_PRIVATE_MASK_HI_OFFSET);
+
+       iowrite32(0x00108823, ccp->io_regs + CMD5_CLK_GATE_CTL_OFFSET);
+
+       ccp5_config(ccp);
+}
+
+/* Version 5 adds some function, but is essentially the same as v5 */
 static const struct ccp_actions ccp5_actions = {
        .aes = ccp5_perform_aes,
        .xts_aes = ccp5_perform_xts_aes,
@@ -974,3 +1001,11 @@ struct ccp_vdata ccpv5 = {
        .bar = 2,
        .offset = 0x0,
 };
+
+struct ccp_vdata ccpv5other = {
+       .version = CCP_VERSION(5, 0),
+       .setup = ccp5other_config,
+       .perform = &ccp5_actions,
+       .bar = 2,
+       .offset = 0x0,
+};

diff --git a/drivers/crypto/ccp/ccp-dev.h b/drivers/crypto/ccp/ccp-dev.h
index d04bd61ed845ac1e937103ab66fda853e0c32952..ebc93652833b0ea4ff6f40ba6f7d00b429792832 100644 (file)
--- a/drivers/crypto/ccp/ccp-dev.h
+++ b/drivers/crypto/ccp/ccp-dev.h
@@ -63,7 +63,9 @@
 
 /* ------------------------ CCP Version 5 Specifics ------------------------ */
 #define CMD5_QUEUE_MASK_OFFSET         0x00
+#define        CMD5_QUEUE_PRIO_OFFSET          0x04
 #define CMD5_REQID_CONFIG_OFFSET       0x08
+#define        CMD5_CMD_TIMEOUT_OFFSET         0x10
 #define LSB_PUBLIC_MASK_LO_OFFSET      0x18
 #define LSB_PUBLIC_MASK_HI_OFFSET      0x1C
 #define LSB_PRIVATE_MASK_LO_OFFSET     0x20
@@ -83,6 +85,11 @@
 #define CMD5_Q_ABORT_BASE              0x0114
 #define CMD5_Q_AX_CACHE_BASE           0x0118
 
+#define        CMD5_CONFIG_0_OFFSET            0x6000
+#define        CMD5_TRNG_CTL_OFFSET            0x6008
+#define        CMD5_AES_MASK_OFFSET            0x6010
+#define        CMD5_CLK_GATE_CTL_OFFSET        0x603C
+
 /* Address offset between two virtual queue registers */
 #define CMD5_Q_STATUS_INCR             0x1000
 
@@ -634,5 +641,6 @@ struct ccp_vdata {
 
 extern struct ccp_vdata ccpv3;
 extern struct ccp_vdata ccpv5;
+extern struct ccp_vdata ccpv5other;
 
 #endif

diff --git a/drivers/crypto/ccp/ccp-pci.c b/drivers/crypto/ccp/ccp-pci.c
index 064e20f78b1064fe1e10f8126b5f001c91f888bd..239cbf2630bff142d5930bc14de90a48c9fa2e2d 100644 (file)
--- a/drivers/crypto/ccp/ccp-pci.c
+++ b/drivers/crypto/ccp/ccp-pci.c
@@ -232,6 +232,7 @@ static int ccp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 
        if (ccp->vdata->setup)
                ccp->vdata->setup(ccp);
+
        ret = ccp->vdata->perform->init(ccp);
        if (ret)
                goto e_iomap;
@@ -325,6 +326,7 @@ static int ccp_pci_resume(struct pci_dev *pdev)
 static const struct pci_device_id ccp_pci_table[] = {
        { PCI_VDEVICE(AMD, 0x1537), (kernel_ulong_t)&ccpv3 },
        { PCI_VDEVICE(AMD, 0x1456), (kernel_ulong_t)&ccpv5 },
+       { PCI_VDEVICE(AMD, 0x1468), (kernel_ulong_t)&ccpv5other },
        /* Last entry must be zero */
        { 0, }
 };