One of the state of CPUidle on Tegra can power gate the CPU and the
vdd_cpu rail. But it depends on some configurations from DT and a common
hook function for different Tegra SoCs to power gate the CPU rail. And
these stuffs are initialized after common Tegra suspend init function. So
we move the CPUidle init behind the suspend init function. And making the
CPUidle driver more generic.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
#include "board.h"
#include "common.h"
+#include "cpuidle.h"
#include "fuse.h"
#include "iomap.h"
#include "irq.h"
void __init tegra_init_late(void)
{
tegra_init_suspend();
+ tegra_cpuidle_init();
tegra_powergate_debugfs_init();
}
#include "fuse.h"
#include "cpuidle.h"
-static int __init tegra_cpuidle_init(void)
+void __init tegra_cpuidle_init(void)
{
- int ret;
-
switch (tegra_chip_id) {
case TEGRA20:
- ret = tegra20_cpuidle_init();
+ tegra20_cpuidle_init();
break;
case TEGRA30:
- ret = tegra30_cpuidle_init();
+ tegra30_cpuidle_init();
break;
case TEGRA114:
- ret = tegra114_cpuidle_init();
+ tegra114_cpuidle_init();
break;
default:
- ret = -ENODEV;
break;
}
-
- return ret;
}
-device_initcall(tegra_cpuidle_init);
static inline int tegra114_cpuidle_init(void) { return -ENODEV; }
#endif
+#ifdef CONFIG_CPU_IDLE
+void tegra_cpuidle_init(void);
+#else
+static inline void tegra_cpuidle_init(void) {}
+#endif
+
#endif