clk: shmobile: fix setting paretn clock rate

If the driver needs to change a clock rate, then it must be propogated
through the MSTP clock to the parent clock (such as shdi0 -> sd0). Without
this we cannot up-rate default clocks which are really slow (such as the
mmcif1 which defaults to 12MHz where it could be running at 97MHz)

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

diff --git a/drivers/clk/shmobile/clk-mstp.c b/drivers/clk/shmobile/clk-mstp.c
index 42d5912b1d25aa908314f62c4138052e9fd51a15..2e5810c88d1150874ece970fb64136a450ef64a6 100644 (file)
--- a/drivers/clk/shmobile/clk-mstp.c
+++ b/drivers/clk/shmobile/clk-mstp.c
@@ -137,7 +137,7 @@ cpg_mstp_clock_register(const char *name, const char *parent_name,
 
        init.name = name;
        init.ops = &cpg_mstp_clock_ops;
-       init.flags = CLK_IS_BASIC;
+       init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT;
        init.parent_names = &parent_name;
        init.num_parents = 1;