MLK-9611 arm: imx6: add support for imx6sx suspend to ocram 0x008f8000

On imx6sx, it has a dedicated ocram for low power mode. We need to do
some workaround to make imx6sx suspend to ocram 0x008f8000

part of the code is copied from imx_3.10.y branch:

	commit 4c6e459d8b91c23d52d1d6e1a51a3be8f7c0230a
	Author: Anson Huang <b20788@freescale.com>
	Date:   Tue Feb 11 15:33:05 2014 +0800

    	e-n-g-r 00298524-6 ARM: imx: enable suspend/resume for i.mx6sx

    	Enable suspend/resume feature for i.mx6sx 17x17 arm2 board,
    	for dsm mode, as we use dedicated ocram space for low
    	power function(start from 0x8f8000), but ROM code still
    	use previous ocram space(0x900000) for checking jump address,
    	so we need to enable ROMCP of data patch to workaround this
    	issue.

Signed-off-by: Bai Ping <b51503@freescale.com>
Signed-off-by: Anson Huang <b20788@freescale.com>

diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index c5835e3b6ed64c110fb18a3928a3277f4cc68874..e54aaddd1a87aa0482d739c07d663d79a69734e6 100644 (file)
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -979,6 +979,11 @@
                                clocks = <&clks IMX6SX_CLK_OCOTP>;
                        };
 
+                       romcp@021ac000 {
+                               compatible = "fsl,imx6sx-romcp", "syscon";
+                               reg = <0x021ac000 0x4000>;
+                       };
+
                        sai1: sai@021d4000 {
                                compatible = "fsl,imx6sx-sai";
                                reg = <0x021d4000 0x4000>;

diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index 8c4f05e923a27bbb07b9b35b40fd8bfb004c0953..176d2c263e292c7232ef515c3becf2739929be20 100644 (file)
--- a/arch/arm/mach-imx/pm-imx6.c
+++ b/arch/arm/mach-imx/pm-imx6.c
@@ -66,13 +66,22 @@
 #define MX6Q_SUSPEND_OCRAM_SIZE                0x1000
 #define MX6_MAX_MMDC_IO_NUM            33
 
+#define ROMC_ROMPATCH0D                0xf0
+#define ROMC_ROMPATCHCNTL              0xf4
+#define ROMC_ROMPATCHENL               0xfc
+#define ROMC_ROMPATCH0A                0x100
+#define BM_ROMPATCHCNTL_0D             (0x1 << 0)
+#define BM_ROMPATCHCNTL_DIS            (0x1 << 29)
+#define BM_ROMPATCHENL_0D              (0x1 << 0)
+#define ROM_ADDR_FOR_INTERNAL_RAM_BASE 0x10d7c
+
 unsigned long iram_tlb_base_addr;
 unsigned long iram_tlb_phys_addr;
 
 static void __iomem *ccm_base;
 static void __iomem *suspend_ocram_base;
 static void (*imx6_suspend_in_ocram_fn)(void __iomem *ocram_vbase);
-
+struct regmap *romcp;
 /*
  * suspend ocram space layout:
  * ======================== high address ======================
@@ -639,4 +648,26 @@ void __init imx6sl_pm_init(void)
 void __init imx6sx_pm_init(void)
 {
        imx6_pm_common_init(&imx6sx_pm_data);
+       /*
+        * As there is a 16K OCRAM(start from 0x8f8000)
+        * dedicated for low power function on i.MX6SX,
+        * but ROM did NOT do the ocram address change
+        * accordingly, so we need to add a data patch
+        * to workaround this issue, otherwise, system
+        * will fail to resume from DSM mode.
+        */
+       romcp = syscon_regmap_lookup_by_compatible("fsl,imx6sx-romcp");
+       if (IS_ERR(romcp)) {
+               pr_err("failed to find fsl,imx6sx-romcp regmap\n");
+               return;
+       }
+       regmap_write(romcp, ROMC_ROMPATCH0D, iram_tlb_phys_addr);
+       regmap_update_bits(romcp, ROMC_ROMPATCHCNTL,
+               BM_ROMPATCHCNTL_0D, BM_ROMPATCHCNTL_0D);
+       regmap_update_bits(romcp, ROMC_ROMPATCHENL,
+               BM_ROMPATCHENL_0D, BM_ROMPATCHENL_0D);
+       regmap_write(romcp, ROMC_ROMPATCH0A,
+               ROM_ADDR_FOR_INTERNAL_RAM_BASE);
+       regmap_update_bits(romcp, ROMC_ROMPATCHCNTL,
+               BM_ROMPATCHCNTL_DIS, ~BM_ROMPATCHCNTL_DIS);
 }