siimage: PIO1/2 taskfile transfer overclocking fix

Fix two typos found by SiI680A documentation check.  They caused the taskfile
transfer overclocking:

- in PIO mode 1 as 0x2283 must be used for both data and taskfile transfers;

- in PIO mode 2 as data and taskfile timings are swapped when writing to the
  MMIO regs.

Fix coding style and trailing whitespace in enclosing statements while at it...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>

diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index f1ca154dd52ca088f25ec0c0ac28845a47a59e18..df43d810cfe83d1a232ef05efab698d5023c9299 100644 (file)
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -1,8 +1,9 @@
 /*
- * linux/drivers/ide/pci/siimage.c             Version 1.07    Nov 30, 2003
+ * linux/drivers/ide/pci/siimage.c             Version 1.11    Jan 27, 2007
  *
  * Copyright (C) 2001-2002     Andre Hedrick <andre@linux-ide.org>
  * Copyright (C) 2003          Red Hat <alan@redhat.com>
+ * Copyright (C) 2007          MontaVista Software, Inc.
  *
  *  May be copied or modified under the terms of the GNU General Public License
  *
@@ -209,41 +210,39 @@ static void siimage_tuneproc (ide_drive_t *drive, byte mode_wanted)
        unsigned long tfaddr    = siimage_selreg(hwif, 0x02);
        
        /* cheat for now and use the docs */
-       switch(mode_wanted) {
-               case 4: 
-                       speedp = 0x10c1; 
-                       speedt = 0x10c1;
-                       break;
-               case 3: 
-                       speedp = 0x10C3; 
-                       speedt = 0x10C3;
-                       break;
-               case 2: 
-                       speedp = 0x1104; 
-                       speedt = 0x1281;
-                       break;
-               case 1:         
-                       speedp = 0x2283; 
-                       speedt = 0x1281;
-                       break;
-               case 0:
-               default:
-                       speedp = 0x328A; 
-                       speedt = 0x328A;
-                       break;
+       switch (mode_wanted) {
+       case 4:
+               speedp = 0x10c1;
+               speedt = 0x10c1;
+               break;
+       case 3:
+               speedp = 0x10c3;
+               speedt = 0x10c3;
+               break;
+       case 2:
+               speedp = 0x1104;
+               speedt = 0x1281;
+               break;
+       case 1:
+               speedp = 0x2283;
+               speedt = 0x2283;
+               break;
+       case 0:
+       default:
+               speedp = 0x328a;
+               speedt = 0x328a;
+               break;
        }
-       if (hwif->mmio)
-       {
-               hwif->OUTW(speedt, addr);
-               hwif->OUTW(speedp, tfaddr);
+
+       if (hwif->mmio) {
+               hwif->OUTW(speedp, addr);
+               hwif->OUTW(speedt, tfaddr);
                /* Now set up IORDY */
                if(mode_wanted == 3 || mode_wanted == 4)
                        hwif->OUTW(hwif->INW(tfaddr-2)|0x200, tfaddr-2);
                else
                        hwif->OUTW(hwif->INW(tfaddr-2)&~0x200, tfaddr-2);
-       }
-       else
-       {
+       } else {
                pci_write_config_word(hwif->pci_dev, addr, speedp);
                pci_write_config_word(hwif->pci_dev, tfaddr, speedt);
                pci_read_config_word(hwif->pci_dev, tfaddr-2, &speedp);