ENGR00219024 [EPDC]Fix EPDC resume failure.

Need to enable both axi and pix clock before doing EPDC reset,
or the hardware reset will fail, which will result in dead loop
of EPDC resume function, and block system resume.

Signed-off-by: Anson Huang <b20788@freescale.com>

diff --git a/drivers/video/mxc/mxc_epdc_fb.c b/drivers/video/mxc/mxc_epdc_fb.c
index f78200887054326c9019dc45178177c7d83fcf2c..0b3923c2cea666980e4c19b25ccb46fd98362a23 100644 (file)
--- a/drivers/video/mxc/mxc_epdc_fb.c
+++ b/drivers/video/mxc/mxc_epdc_fb.c
@@ -857,6 +857,7 @@ static void epdc_init_settings(struct mxc_epdc_fb_data *fb_data)
 
        /* Enable clocks to access EPDC regs */
        clk_enable(fb_data->epdc_clk_axi);
+       clk_enable(fb_data->epdc_clk_pix);
 
        /* Reset */
        __raw_writel(EPDC_CTRL_SFTRST, EPDC_CTRL_SET);
@@ -1027,6 +1028,7 @@ static void epdc_init_settings(struct mxc_epdc_fb_data *fb_data)
 
        /* Disable clock */
        clk_disable(fb_data->epdc_clk_axi);
+       clk_disable(fb_data->epdc_clk_pix);
 }
 
 static void epdc_powerup(struct mxc_epdc_fb_data *fb_data)