ARM: dts: socfpga: enable qspi on the Cyclone5 devkit

Enable the qspi controller on the devkit and add the flash chip.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
index 7a5f42dba12e0c5b7a9a14d217b6b323b2f3020d..6306d008f01b756991994267cb2538b7a2c93f94 100644 (file)
--- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
@@ -87,6 +87,39 @@
        status = "okay";
 };
 
+&qspi {
+       status = "okay";
+
+       flash0: n25q00@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "n25q00";
+               reg = <0>;      /* chip select */
+               spi-max-frequency = <100000000>;
+
+               m25p,fast-read;
+               cdns,page-size = <256>;
+               cdns,block-size = <16>;
+               cdns,read-delay = <4>;
+               cdns,tshsl-ns = <50>;
+               cdns,tsd2d-ns = <50>;
+               cdns,tchsh-ns = <4>;
+               cdns,tslch-ns = <4>;
+
+               partition@qspi-boot {
+                       /* 8MB for raw data. */
+                       label = "Flash 0 Raw Data";
+                       reg = <0x0 0x800000>;
+               };
+
+               partition@qspi-rootfs {
+                       /* 120MB for jffs2 data. */
+                       label = "Flash 0 jffs2 Filesystem";
+                       reg = <0x800000 0x7800000>;
+               };
+       };
+};
+
 &usb1 {
        status = "okay";
 };