Merge commit 'v2.6.27-rc6' into x86/iommu

diff --combined arch/x86/kernel/amd_iommu.c
index d15081c38237ce67a6b14b773cb7bf8dfbfc0b36,69b4d060b21c4c32e8e40b45c9dc2171c1b56505..01c68c38840d8b8997e5d801e508dd20185605f0
--- 1/arch/x86/kernel/amd_iommu.c
--- 2/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@@ -65,7 -65,7 +65,7 @@@ static int __iommu_queue_command(struc
        u8 *target;
  
        tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
-       target = (iommu->cmd_buf + tail);
+       target = iommu->cmd_buf + tail;
        memcpy_toio(target, cmd, sizeof(*cmd));
        tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size;
        head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
@@@ -1038,6 -1038,8 +1038,6 @@@ out
  
  /*
   * The exported free_coherent function for dma_ops.
 - * FIXME: fix the generic x86 DMA layer so that it actually calls that
 - *        function.
   */
  static void free_coherent(struct device *dev, size_t size,
                          void *virt_addr, dma_addr_t dma_addr)

diff --combined arch/x86/kernel/pci-calgary_64.c
index afb020fdb19cbfa30b21ee9fe6838bbaa8698ddf,dcdac6c826e98047138f1e915e2d6b6ffbaf5ddd..8415d92853c4a474ba486912fd40808b6ecebcf4
--- 1/arch/x86/kernel/pci-calgary_64.c
--- 2/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@@ -343,9 -343,8 +343,8 @@@ static void iommu_free(struct iommu_tab
        /* were we called with bad_dma_address? */
        badend = bad_dma_address + (EMERGENCY_PAGES * PAGE_SIZE);
        if (unlikely((dma_addr >= bad_dma_address) && (dma_addr < badend))) {
-               printk(KERN_ERR "Calgary: driver tried unmapping bad DMA "
+               WARN(1, KERN_ERR "Calgary: driver tried unmapping bad DMA "
                       "address 0x%Lx\n", dma_addr);
-               WARN_ON(1);
                return;
        }
  
@@@ -511,22 -510,8 +510,22 @@@ error
        return ret;
  }
  
 +static void calgary_free_coherent(struct device *dev, size_t size,
 +                                void *vaddr, dma_addr_t dma_handle)
 +{
 +      unsigned int npages;
 +      struct iommu_table *tbl = find_iommu_table(dev);
 +
 +      size = PAGE_ALIGN(size);
 +      npages = size >> PAGE_SHIFT;
 +
 +      iommu_free(tbl, dma_handle, npages);
 +      free_pages((unsigned long)vaddr, get_order(size));
 +}
 +
  static struct dma_mapping_ops calgary_dma_ops = {
        .alloc_coherent = calgary_alloc_coherent,
 +      .free_coherent = calgary_free_coherent,
        .map_single = calgary_map_single,
        .unmap_single = calgary_unmap_single,
        .map_sg = calgary_map_sg,
@@@ -1283,13 -1268,15 +1282,15 @@@ static inline int __init determine_tce_
  static int __init build_detail_arrays(void)
  {
        unsigned long ptr;
-       int i, scal_detail_size, rio_detail_size;
+       unsigned numnodes, i;
+       int scal_detail_size, rio_detail_size;
  
-       if (rio_table_hdr->num_scal_dev > MAX_NUMNODES){
+       numnodes = rio_table_hdr->num_scal_dev;
+       if (numnodes > MAX_NUMNODES){
                printk(KERN_WARNING
                        "Calgary: MAX_NUMNODES too low! Defined as %d, "
                        "but system has %d nodes.\n",
-                       MAX_NUMNODES, rio_table_hdr->num_scal_dev);
+                       MAX_NUMNODES, numnodes);
                return -ENODEV;
        }
  
@@@ -1310,8 -1297,7 +1311,7 @@@
        }
  
        ptr = ((unsigned long)rio_table_hdr) + 3;
-       for (i = 0; i < rio_table_hdr->num_scal_dev;
-                   i++, ptr += scal_detail_size)
+       for (i = 0; i < numnodes; i++, ptr += scal_detail_size)
                scal_devs[i] = (struct scal_detail *)ptr;
  
        for (i = 0; i < rio_table_hdr->num_rio_dev;

diff --combined include/linux/pci_ids.h
index 0d0b314476c92782b6168ccdba6b9a89466ebebf,f1624b3967548fc116211aee27114e65e91f5d36..2886b0eb53ec5d9efbf09512608de851bd29d5a1
--- 1/include/linux/pci_ids.h
--- 2/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@@ -497,11 -497,6 +497,11 @@@
  #define PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP       0x1101
  #define PCI_DEVICE_ID_AMD_K8_NB_MEMCTL        0x1102
  #define PCI_DEVICE_ID_AMD_K8_NB_MISC  0x1103
 +#define PCI_DEVICE_ID_AMD_11H_NB_HT   0x1300
 +#define PCI_DEVICE_ID_AMD_11H_NB_MAP  0x1301
 +#define PCI_DEVICE_ID_AMD_11H_NB_DRAM 0x1302
 +#define PCI_DEVICE_ID_AMD_11H_NB_MISC 0x1303
 +#define PCI_DEVICE_ID_AMD_11H_NB_LINK 0x1304
  #define PCI_DEVICE_ID_AMD_LANCE               0x2000
  #define PCI_DEVICE_ID_AMD_LANCE_HOME  0x2001
  #define PCI_DEVICE_ID_AMD_SCSI                0x2020
@@@ -2433,6 -2428,9 +2433,9 @@@
  #define PCI_DEVICE_ID_INTEL_ICH10_3   0x3a1a
  #define PCI_DEVICE_ID_INTEL_ICH10_4   0x3a30
  #define PCI_DEVICE_ID_INTEL_ICH10_5   0x3a60
+ #define PCI_DEVICE_ID_INTEL_PCH_0     0x3b10
+ #define PCI_DEVICE_ID_INTEL_PCH_1     0x3b11
+ #define PCI_DEVICE_ID_INTEL_PCH_2     0x3b30
  #define PCI_DEVICE_ID_INTEL_IOAT_SNB  0x402f
  #define PCI_DEVICE_ID_INTEL_5100_16   0x65f0
  #define PCI_DEVICE_ID_INTEL_5100_21   0x65f5