MX6SX_PAD_SD1_DATA0__GPIO6_IO_2 0x17059
MX6SX_PAD_SD1_DATA3__GPIO6_IO_5 0xb000
MX6SX_PAD_CSI_DATA03__GPIO1_IO_17 0x17059
+ MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0
>;
};
/*
* Copyright (C) 1999 ARM Limited
* Copyright (C) 2000 Deep Blue Solutions Ltd
- * Copyright 2006-2014 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2006-2015 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
* Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
*
* so do WDOG2 reset here. Do not set SRS, since we will
* trigger external POR later. Use WDOG1 to reset in ldo-enable
* mode. You can set it by "fsl,wdog-reset" in dts.
+ * For i.MX6SX we have to trigger wdog-reset to reset QSPI-NOR flash to
+ * workaround qspi-nor reboot issue whatever ldo-bypass or not.
*/
- else if (wdog_source == 2 && (cpu_is_imx6q() || cpu_is_imx6dl() ||
- cpu_is_imx6sl()))
+ else if ((wdog_source == 2 && (cpu_is_imx6q() || cpu_is_imx6dl() ||
+ cpu_is_imx6sl())) || cpu_is_imx6sx())
wcr_enable = 0x14;
else
wcr_enable = (1 << 2);