Merge remote-tracking branch 'arm-lpae/for-next'

Conflicts:
	arch/arm/include/asm/page.h
	arch/arm/include/asm/pgalloc.h
	arch/arm/include/asm/pgtable-hwdef.h
	arch/arm/include/asm/pgtable.h
	arch/arm/include/asm/tlb.h
	arch/arm/kernel/head.S
	arch/arm/kernel/sleep.S
	arch/arm/mm/dma-mapping.c
	arch/arm/mm/mmu.c

diff --cc arch/arm/Kconfig
Simple merge

diff --cc arch/arm/boot/compressed/head.S
Simple merge

diff --cc arch/arm/include/asm/proc-fns.h
index 9e92cb205e656e61d1b47a3aed9268dd343db205,34e852c636e0b97ef24ba32bcb8e70e6a9ab8a61..f3628fb3d2b331a9dba24fc29fdb8bf4b3c6b3d1
--- 1/arch/arm/include/asm/proc-fns.h
--- 2/arch/arm/include/asm/proc-fns.h
+++ b/arch/arm/include/asm/proc-fns.h
@@@ -79,12 -83,12 +83,16 @@@ extern void cpu_proc_fin(void)
  extern int cpu_do_idle(void);
  extern void cpu_dcache_clean_area(void *, int);
  extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm);
+ #ifdef CONFIG_ARM_LPAE
+ extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte);
+ #else
  extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext);
+ #endif
  extern void cpu_reset(unsigned long addr) __attribute__((noreturn));
 +
 +/* These three are private to arch/arm/kernel/suspend.c */
 +extern void cpu_do_suspend(void *);
 +extern void cpu_do_resume(void *);
  #else
  #define cpu_proc_init                 processor._proc_init
  #define cpu_proc_fin                  processor._proc_fin

diff --cc arch/arm/include/asm/system.h
Simple merge

diff --cc arch/arm/kernel/head.S
Simple merge

diff --cc arch/arm/kernel/hw_breakpoint.c
Simple merge

diff --cc arch/arm/kernel/setup.c
Simple merge

diff --cc arch/arm/kernel/sleep.S
index 020e99c845e722c2928b1fd9816b23e85fbc9d5a,ecece65251fadb3ea9e4adacbc8ac0d388c2d3d9..4ac45fe955fed622272c133ead242f3bf642688b
--- 1/arch/arm/kernel/sleep.S
--- 2/arch/arm/kernel/sleep.S
+++ b/arch/arm/kernel/sleep.S
@@@ -52,17 -67,35 +52,19 @@@ ENDPROC(cpu_suspend_abort
  
  /*
   * r0 = control register value
 - * r1 = v:p offset (preserved by cpu_do_resume)
 - * r2 = phys page table base
 - * r3 = L1 section flags
   */
 +      .align  5
  ENTRY(cpu_resume_mmu)
 -      adr     r4, cpu_resume_turn_mmu_on
 -      mov     r4, r4, lsr #20
 -      orr     r3, r3, r4, lsl #20
 -      ldr     r5, [r2, r4, lsl #2]    @ save old mapping
 -      str     r3, [r2, r4, lsl #2]    @ setup 1:1 mapping for mmu code
 -      sub     r2, r2, r1
        ldr     r3, =cpu_resume_after_mmu
 -      bic     r1, r0, #CR_C           @ ensure D-cache is disabled
 -      b       cpu_resume_turn_mmu_on
 -ENDPROC(cpu_resume_mmu)
 -      .ltorg
 -      .align  5
 -cpu_resume_turn_mmu_on:
+       instr_sync
 -      mcr     p15, 0, r1, c1, c0, 0   @ turn on MMU, I-cache, etc
 -      mrc     p15, 0, r1, c0, c0, 0   @ read id reg
 +      mcr     p15, 0, r0, c1, c0, 0   @ turn on MMU, I-cache, etc
 +      mrc     p15, 0, r0, c0, c0, 0   @ read id reg
+       instr_sync
 -      mov     r1, r1
 -      mov     r1, r1
 +      mov     r0, r0
 +      mov     r0, r0
        mov     pc, r3                  @ jump to virtual address
 -ENDPROC(cpu_resume_turn_mmu_on)
 +ENDPROC(cpu_resume_mmu)
  cpu_resume_after_mmu:
 -      str     r5, [r2, r4, lsl #2]    @ restore old mapping
 -      mcr     p15, 0, r0, c1, c0, 0   @ turn on D-cache
        bl      cpu_init                @ restore the und/abt/irq banked regs
        mov     r0, #0                  @ return zero on success
        ldmfd   sp!, {r4 - r11, pc}