wil6210: TX vring optimization

Tx vring needs to be enlarged to get better
performance for traffic over 2Gbps.

Signed-off-by: Hamad Kadmany <qca_hkadmany@qca.qualcomm.com>
Signed-off-by: Maya Erez <qca_merez@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>

diff --git a/drivers/net/wireless/ath/wil6210/debugfs.c b/drivers/net/wireless/ath/wil6210/debugfs.c
index 97bc186f9728247a0048476065d17fe0021a3573..98c9148a34500c93f3c7625d91f2efbc524aba06 100644 (file)
--- a/drivers/net/wireless/ath/wil6210/debugfs.c
+++ b/drivers/net/wireless/ath/wil6210/debugfs.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2015 Qualcomm Atheros, Inc.
+ * Copyright (c) 2012-2016 Qualcomm Atheros, Inc.
  *
  * Permission to use, copy, modify, and/or distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
@@ -68,13 +68,13 @@ static void wil_print_vring(struct seq_file *s, struct wil6210_priv *wil,
                seq_puts(s, "???\n");
        }
 
-       if (vring->va && (vring->size < 1025)) {
+       if (vring->va && (vring->size <= (1 << WIL_RING_SIZE_ORDER_MAX))) {
                uint i;
 
                for (i = 0; i < vring->size; i++) {
                        volatile struct vring_tx_desc *d = &vring->va[i].tx;
 
-                       if ((i % 64) == 0 && (i != 0))
+                       if ((i % 128) == 0 && (i != 0))
                                seq_puts(s, "\n");
                        seq_printf(s, "%c", (d->dma.status & BIT(0)) ?
                                        _s : (vring->ctx[i].skb ? _h : 'h'));

diff --git a/drivers/net/wireless/ath/wil6210/wil6210.h b/drivers/net/wireless/ath/wil6210/wil6210.h
index 950296507dd199e7fa2a9f396d30fa301658c800..8427d68b6fa8e875a2ae13cbdcaf5b3b187b19e9 100644 (file)
--- a/drivers/net/wireless/ath/wil6210/wil6210.h
+++ b/drivers/net/wireless/ath/wil6210/wil6210.h
@@ -51,7 +51,7 @@ static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
 
 #define WIL_TX_Q_LEN_DEFAULT           (4000)
 #define WIL_RX_RING_SIZE_ORDER_DEFAULT (10)
-#define WIL_TX_RING_SIZE_ORDER_DEFAULT (10)
+#define WIL_TX_RING_SIZE_ORDER_DEFAULT (12)
 #define WIL_BCAST_RING_SIZE_ORDER_DEFAULT      (7)
 #define WIL_BCAST_MCS0_LIMIT           (1024) /* limit for MCS0 frame size */
 /* limit ring size in range [32..32k] */