ENGR00170434: MX6 - Add support to read Silicon version

Read the silicon version stored in ROM at address ox48.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>

diff --git a/arch/arm/mach-mx6/cpu.c b/arch/arm/mach-mx6/cpu.c
index c9690ed7814ac1585e843b9a3dda8acda3eb1e2d..bfc499328d4f93ab9dd5eca29f0d222fab66bec5 100644 (file)
--- a/arch/arm/mach-mx6/cpu.c
+++ b/arch/arm/mach-mx6/cpu.c
@@ -44,6 +44,49 @@ u32 arm_max_freq = CPU_AT_1GHz;
 void __iomem *gpc_base;
 void __iomem *ccm_base;
 
+static int cpu_silicon_rev = -1;
+#define SI_REV_OFFSET  0x48
+
+static int get_mx6q_srev(void)
+{
+       void __iomem *romcp = ioremap(BOOT_ROM_BASE_ADDR, SZ_8K);
+       u32 rev;
+
+       if (!romcp) {
+               cpu_silicon_rev = -EINVAL;
+               return 0;
+       }
+
+       rev = __raw_readl(romcp + SI_REV_OFFSET);
+       rev &= 0xff;
+
+       iounmap(romcp);
+       if (rev == 0x10)
+               return IMX_CHIP_REVISION_1_0;
+       else if (rev == 0x11)
+               return IMX_CHIP_REVISION_1_1;
+       else if (rev == 0x20)
+               return IMX_CHIP_REVISION_2_0;
+       return 0;
+}
+
+/*
+ * Returns:
+ *     the silicon revision of the cpu
+ *     -EINVAL - not a mx50
+ */
+int mx6q_revision(void)
+{
+       if (!cpu_is_mx6q())
+               return -EINVAL;
+
+       if (cpu_silicon_rev == -1)
+               cpu_silicon_rev = get_mx6q_srev();
+
+       return cpu_silicon_rev;
+}
+EXPORT_SYMBOL(mx6q_revision);
+
 static int __init post_cpu_init(void)
 {
        unsigned int reg;

diff --git a/arch/arm/mach-mx6/mm.c b/arch/arm/mach-mx6/mm.c
index bbaa6ae15c4b87f8f8037f106016166fb2668d14..fa1c78be532f47ed2876d6f2d380580496598b14 100644 (file)
--- a/arch/arm/mach-mx6/mm.c
+++ b/arch/arm/mach-mx6/mm.c
@@ -35,6 +35,11 @@
  * This structure defines the MX6 memory map.
  */
 static struct map_desc mx6_io_desc[] __initdata = {
+       {
+       .virtual = BOOT_ROM_BASE_ADDR_VIRT,
+       .pfn = __phys_to_pfn(BOOT_ROM_BASE_ADDR),
+       .length = ROMCP_SIZE,
+       .type = MT_DEVICE},
        {
        .virtual = AIPS1_BASE_ADDR_VIRT,
        .pfn = __phys_to_pfn(AIPS1_ARB_BASE_ADDR),

diff --git a/arch/arm/plat-mxc/include/mach/mx6.h b/arch/arm/plat-mxc/include/mach/mx6.h
index 5100add84d07d7caa376d2bb6e57aee3f8d8bb9e..e09be19b8d826312b2b23d76c3b578e526eeafb1 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mx6.h
+++ b/arch/arm/plat-mxc/include/mach/mx6.h
@@ -253,9 +253,11 @@
 
 /* define virtual address */
 #define PERIPBASE_VIRT 0xF2000000
+#define BOOT_ROM_BASE_ADDR_VIRT        (PERIPBASE_VIRT + BOOT_ROM_BASE_ADDR)
 #define AIPS1_BASE_ADDR_VIRT (PERIPBASE_VIRT + AIPS1_ARB_BASE_ADDR)
 #define AIPS2_BASE_ADDR_VIRT (PERIPBASE_VIRT + AIPS2_ARB_BASE_ADDR)
 #define ARM_PERIPHBASE_VIRT     (PERIPBASE_VIRT + ARM_PERIPHBASE)
+#define ROMCP_SIZE SZ_1M
 #define AIPS1_SIZE SZ_1M
 #define AIPS2_SIZE SZ_1M
 #define ARM_PERIPHBASE_SIZE (SZ_8K + SZ_4K)