config MXC_TVIN_ADV7180
tristate "Analog Device adv7180 TV Decoder Input support"
- depends on (MACH_MX35_3DS || MACH_MX51_3DS)
+ depends on (MACH_MX35_3DS || MACH_MX51_3DS || MACH_MX6Q_SABREAUTO)
---help---
If you plan to use the adv7180 video decoder with your MXC system, say Y here.
/*
- * Copyright 2005-2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2005-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
#include <linux/ctype.h>
#include <linux/types.h>
#include <linux/delay.h>
+#include <linux/semaphore.h>
#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/wait.h>
static struct regulator *dvdd_regulator;
static struct regulator *avdd_regulator;
static struct regulator *pvdd_regulator;
-static struct mxc_tvin_platform_data *tvin_plat;
+static struct fsl_mxc_tvin_platform_data *tvin_plat;
extern void gpio_sensor_active(void);
extern void gpio_sensor_inactive(void);
};
/*!
- * Maintains the information on the current state of the sesor.
+ * Maintains the information on the current state of the sensor.
*/
struct sensor {
struct v4l2_int_device *v4l2_int_device;
* read/write access to the globally accessible data structures
* and variables that were defined above.
*/
-static DECLARE_MUTEX(mutex);
+static DEFINE_SEMAPHORE(semaphore);
#define IF_NAME "adv7180"
#define ADV7180_INPUT_CTL 0x00 /* Input Control */
/* Read the AD_RESULT to get the detect output video standard */
tmp = adv7180_read(ADV7180_STATUS_1) & 0x70;
- down(&mutex);
+ down(&semaphore);
if (tmp == 0x40) {
/* PAL */
*std = V4L2_STD_PAL;
*std = V4L2_STD_ALL;
idx = ADV7180_NOT_LOCKED;
dev_dbg(&adv7180_data.i2c_client->dev,
- "Got invalid video standard! \n");
+ "Got invalid video standard!\n");
}
- up(&mutex);
+ up(&semaphore);
/* This assumes autodetect which this device uses. */
if (*std != adv7180_data.std_id) {
p->if_type = V4L2_IF_TYPE_BT656; /* This is the only possibility. */
p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT;
p->u.bt656.nobt_hs_inv = 1;
+ p->u.bt656.bt_sync_correct = 1;
/* ADV7180 has a dedicated clock so no clock settings needed. */
int ret = 0;
tvin_plat = client->dev.platform_data;
- dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180_probe\n");
+ pr_debug("In adv7180_probe\n");
if (tvin_plat->dvddio_reg) {
dvddio_regulator =
*/
static int adv7180_detach(struct i2c_client *client)
{
- struct mxc_tvin_platform_data *plat_data = client->dev.platform_data;
+ struct fsl_mxc_tvin_platform_data *plat_data;
+
+ plat_data = client->dev.platform_data;
dev_dbg(&adv7180_data.i2c_client->dev,
- "%s:Removing %s video decoder @ 0x%02X from adapter %s \n",
+ "%s:Removing %s video decoder @ 0x%02X from adapter %s\n",
__func__, IF_NAME, client->addr << 1, client->adapter->name);
if (plat_data->pwdn)
{
u8 err = 0;
- dev_dbg(&adv7180_data.i2c_client->dev, "In adv7180_init\n");
+ pr_debug("In adv7180_init\n");
/* Tells the i2c driver what functions to call for this driver. */
err = i2c_add_driver(&adv7180_i2c_driver);
/*
- * Copyright 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
pr_debug(" Current framerate is %d change to %d\n",
current_fps, parm_fps);
- if ((parm->parm.capture.capturemode == currentparm.parm.capture.capturemode)
- && (current_fps == parm_fps)) {
- return 0;
- }
-
/* This will change any camera settings needed. */
ipu_csi_enable_mclk_if(cam->ipu, CSI_MCLK_I2C, cam->csi, true, true);
err = vidioc_int_s_parm(cam->sensor, parm);
csi_param.csi = 0;
csi_param.mclk = 0;
- /* This may not work on other platforms. Check when adding a new one.*/
+ /*This may not work on other platforms. Check when adding a new one.*/
+ /*The mclk clock was never set correclty in the ipu register*/
+ /*for now we are going to use this mclk as pixel clock*/
+ /*to set csi0_data_dest register.*/
+ /*This is a workaround which should be fixed*/
pr_debug(" clock_curr=mclk=%d\n", ifparm.u.bt656.clock_curr);
if (ifparm.u.bt656.clock_curr == 0) {
csi_param.clk_mode = IPU_CSI_CLK_MODE_CCIR656_INTERLACED;
+ /*protocol bt656 use 27Mhz pixel clock */
+ csi_param.mclk = 27000000;
} else {
csi_param.clk_mode = IPU_CSI_CLK_MODE_GATED_CLK;
}
*/
static int mxc_v4l2_s_std(cam_data *cam, v4l2_std_id e)
{
- pr_debug("In mxc_v4l2_s_std %Lx\n", e);
+ printk(KERN_ERR "In mxc_v4l2_s_std %Lx\n", e);
if (e == V4L2_STD_PAL) {
pr_debug(" Setting standard to PAL %Lx\n", V4L2_STD_PAL);
cam->standard.id = V4L2_STD_PAL;
csi_param.pack_tight = 0;
csi_param.force_eof = 0;
csi_param.data_en_pol = 0;
+
csi_param.mclk = ifparm.u.bt656.clock_curr;
csi_param.pixclk_pol = ifparm.u.bt656.latch_clk_inv;
/*
- * Copyright 2008-2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2008-2012 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
#include "ipu_prv.h"
#include "ipu_regs.h"
+/*!
+ * _ipu_csi_mclk_set
+ *
+ * @param ipu ipu handler
+ * @param pixel_clk desired pixel clock frequency in Hz
+ * @param csi csi 0 or csi 1
+ *
+ * @return Returns 0 on success or negative error code on fail
+ */
+int _ipu_csi_mclk_set(struct ipu_soc *ipu, uint32_t pixel_clk, uint32_t csi)
+{
+ uint32_t temp;
+ uint32_t div_ratio;
+
+ div_ratio = (clk_get_rate(ipu->ipu_clk) / pixel_clk) - 1;
+
+ if (div_ratio > 0xFF || div_ratio < 0) {
+ dev_dbg(ipu->dev, "value of pixel_clk extends normal range\n");
+ return -EINVAL;
+ }
+
+ temp = ipu_csi_read(ipu, csi, CSI_SENS_CONF);
+ temp &= ~CSI_SENS_CONF_DIVRATIO_MASK;
+ ipu_csi_write(ipu, csi, temp |
+ (div_ratio << CSI_SENS_CONF_DIVRATIO_SHIFT),
+ CSI_SENS_CONF);
+
+ return 0;
+}
+
/*!
* ipu_csi_init_interface
* Sets initial values for the CSI registers.
ipu_csi_write(ipu, csi, data, CSI_SENS_CONF);
+ /* Setup the mclk */
+ if (cfg_param.mclk > 0)
+ _ipu_csi_mclk_set(ipu, cfg_param.mclk, csi);
+
/* Setup sensor frame size */
ipu_csi_write(ipu, csi, (width - 1) | (height - 1) << 16, CSI_SENS_FRM_SIZE);
}
EXPORT_SYMBOL(ipu_csi_get_sensor_protocol);
-/*!
- * _ipu_csi_mclk_set
- *
- * @param ipu ipu handler
- * @param pixel_clk desired pixel clock frequency in Hz
- * @param csi csi 0 or csi 1
- *
- * @return Returns 0 on success or negative error code on fail
- */
-int _ipu_csi_mclk_set(struct ipu_soc *ipu, uint32_t pixel_clk, uint32_t csi)
-{
- uint32_t temp;
- uint32_t div_ratio;
-
- div_ratio = (clk_get_rate(ipu->ipu_clk) / pixel_clk) - 1;
-
- if (div_ratio > 0xFF || div_ratio < 0) {
- dev_dbg(ipu->dev, "The value of pixel_clk extends normal range\n");
- return -EINVAL;
- }
-
- temp = ipu_csi_read(ipu, csi, CSI_SENS_CONF);
- temp &= ~CSI_SENS_CONF_DIVRATIO_MASK;
- ipu_csi_write(ipu, csi, temp | (div_ratio << CSI_SENS_CONF_DIVRATIO_SHIFT),
- CSI_SENS_CONF);
-
- return 0;
-}
-
/*!
* ipu_csi_enable_mclk
*
*
* Maintainer: Kumar Gala <galak@kernel.crashing.org>
*
- * Copyright 2004-2011 Freescale Semiconductor, Inc.
+ * Copyright 2004-2012 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
int disp_id;
};
+struct fsl_mxc_tvout_platform_data {
+ char *io_reg;
+ char *core_reg;
+ char *analog_reg;
+ u32 detect_line;
+};
+
+struct fsl_mxc_tvin_platform_data {
+ char *dvddio_reg;
+ char *dvdd_reg;
+ char *avdd_reg;
+ char *pvdd_reg;
+ void (*pwdn) (int pwdn);
+ void (*reset) (void);
+ bool cvbs;
+};
+
struct fsl_mxc_dvi_platform_data {
void (*init) (void);
int (*update) (void);