drm/i915: remove duplicate names for the render ring INSTDONE register

We use 3 different names to refer to the same render ring INSTDONE
register. This can be confusing when comparing two parts of the code
accessing the register via different names. Although the GEN4 version's
layout is different, we treat it the same way as the GEN7+ version, in
that we simply read it out during error capture. So remove the
duplicates and leave a comment about the GEN4 difference.

Note that there is also a GEN2 version of this register, but that's on a
different address so not handled in this patch.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index d979dca1491ab0ac8d350d35cdfcc2940c932662..27423ed98b603be53dc1e9f1cb1233610475496e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1390,10 +1390,10 @@ void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone)
        if (IS_GEN2(dev) || IS_GEN3(dev))
                instdone[0] = I915_READ(INSTDONE);
        else if (IS_GEN4(dev) || IS_GEN5(dev) || IS_GEN6(dev)) {
-               instdone[0] = I915_READ(INSTDONE_I965);
+               instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE));
                instdone[1] = I915_READ(INSTDONE1);
        } else if (INTEL_INFO(dev)->gen >= 7) {
-               instdone[0] = I915_READ(GEN7_INSTDONE_1);
+               instdone[0] = I915_READ(RING_INSTDONE(RENDER_RING_BASE));
                instdone[1] = I915_READ(GEN7_SC_INSTDONE);
                instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE);
                instdone[3] = I915_READ(GEN7_ROW_INSTDONE);

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9e3fdb3722751a2ca24eccd25907d14a5dd6194b..d1e3c3cd27cf54582bc666a0ffbb90f908bba157 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1593,14 +1593,16 @@ enum skl_disp_power_wells {
 #endif
 #define IPEIR_I965     0x02064
 #define IPEHR_I965     0x02068
-#define INSTDONE_I965  0x0206c
-#define GEN7_INSTDONE_1                0x0206c
 #define GEN7_SC_INSTDONE       0x07100
 #define GEN7_SAMPLER_INSTDONE  0x0e160
 #define GEN7_ROW_INSTDONE      0x0e164
 #define I915_NUM_INSTDONE_REG  4
 #define RING_IPEIR(base)       ((base)+0x64)
 #define RING_IPEHR(base)       ((base)+0x68)
+/*
+ * On GEN4, only the render ring INSTDONE exists and has a different
+ * layout than the GEN7+ version.
+ */
 #define RING_INSTDONE(base)    ((base)+0x6c)
 #define RING_INSTPS(base)      ((base)+0x70)
 #define RING_DMA_FADD(base)    ((base)+0x78)