]> git.karo-electronics.de Git - linux-beck.git/commitdiff
ARM: at91: make shutdown controler soc independent
authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Mon, 31 Oct 2011 17:23:20 +0000 (01:23 +0800)
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Mon, 28 Nov 2011 14:50:38 +0000 (22:50 +0800)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
18 files changed:
arch/arm/mach-at91/at91cap9.c
arch/arm/mach-at91/at91sam9260.c
arch/arm/mach-at91/at91sam9261.c
arch/arm/mach-at91/at91sam9263.c
arch/arm/mach-at91/at91sam9g45.c
arch/arm/mach-at91/at91sam9rl.c
arch/arm/mach-at91/board-qil-a9260.c
arch/arm/mach-at91/board-usb-a926x.c
arch/arm/mach-at91/generic.h
arch/arm/mach-at91/include/mach/at91_shdwc.h
arch/arm/mach-at91/include/mach/at91cap9.h
arch/arm/mach-at91/include/mach/at91sam9260.h
arch/arm/mach-at91/include/mach/at91sam9261.h
arch/arm/mach-at91/include/mach/at91sam9263.h
arch/arm/mach-at91/include/mach/at91sam9g45.h
arch/arm/mach-at91/include/mach/at91sam9rl.h
arch/arm/mach-at91/pm.c
arch/arm/mach-at91/setup.c

index 1ea931274bac1d9397a734dd13a8fc01504951b1..652dbe1c9cefc01a99933ecee052fd7aea6b3d8b 100644 (file)
@@ -13,7 +13,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -23,7 +22,6 @@
 #include <mach/at91cap9.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 
 #include "soc.h"
 #include "generic.h"
@@ -319,12 +317,6 @@ static void at91cap9_reset(void)
        at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 }
 
-static void at91cap9_poweroff(void)
-{
-       at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91CAP9 processor initialization
  * -------------------------------------------------------------------- */
@@ -336,6 +328,7 @@ static void __init at91cap9_map_io(void)
 
 static void __init at91cap9_ioremap_registers(void)
 {
+       at91_ioremap_shdwc(AT91CAP9_BASE_SHDWC);
        at91sam926x_ioremap_pit(AT91CAP9_BASE_PIT);
        at91sam9_ioremap_smc(0, AT91CAP9_BASE_SMC);
 }
@@ -343,7 +336,6 @@ static void __init at91cap9_ioremap_registers(void)
 static void __init at91cap9_initialize(void)
 {
        at91_arch_reset = at91cap9_reset;
-       pm_power_off = at91cap9_poweroff;
        at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
 
        /* Register GPIO subsystem */
index fc1f734b80ceb9683839934b3713ab5a79377b59..5a17a23724c27776ad46cacdb7de4d3a1e0c772b 100644 (file)
@@ -11,7 +11,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -21,7 +20,6 @@
 #include <mach/at91sam9260.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 
 #include "soc.h"
 #include "generic.h"
@@ -287,12 +285,6 @@ static struct at91_gpio_bank at91sam9260_gpio[] = {
        }
 };
 
-static void at91sam9260_poweroff(void)
-{
-       at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91SAM9260 processor initialization
  * -------------------------------------------------------------------- */
@@ -328,6 +320,7 @@ static void __init at91sam9260_map_io(void)
 
 static void __init at91sam9260_ioremap_registers(void)
 {
+       at91_ioremap_shdwc(AT91SAM9260_BASE_SHDWC);
        at91sam926x_ioremap_pit(AT91SAM9260_BASE_PIT);
        at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
 }
@@ -335,7 +328,6 @@ static void __init at91sam9260_ioremap_registers(void)
 static void __init at91sam9260_initialize(void)
 {
        at91_arch_reset = at91sam9_alt_reset;
-       pm_power_off = at91sam9260_poweroff;
        at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
                        | (1 << AT91SAM9260_ID_IRQ2);
 
index 804181aedd9e13164fe011ddfd51131d9f69b8fa..80e3e0fac6b1a136c044db328af5b3761267c914 100644 (file)
@@ -11,7 +11,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -20,7 +19,6 @@
 #include <mach/at91sam9261.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 
 #include "soc.h"
 #include "generic.h"
@@ -268,12 +266,6 @@ static struct at91_gpio_bank at91sam9261_gpio[] = {
        }
 };
 
-static void at91sam9261_poweroff(void)
-{
-       at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91SAM9261 processor initialization
  * -------------------------------------------------------------------- */
@@ -288,6 +280,7 @@ static void __init at91sam9261_map_io(void)
 
 static void __init at91sam9261_ioremap_registers(void)
 {
+       at91_ioremap_shdwc(AT91SAM9261_BASE_SHDWC);
        at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT);
        at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
 }
@@ -295,7 +288,6 @@ static void __init at91sam9261_ioremap_registers(void)
 static void __init at91sam9261_initialize(void)
 {
        at91_arch_reset = at91sam9_alt_reset;
-       pm_power_off = at91sam9261_poweroff;
        at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
                        | (1 << AT91SAM9261_ID_IRQ2);
 
index b8f49962e87fe1676f1708511b813b7b8bac3cd3..2a42b99d99d1109510aa804dc856781a676b9d04 100644 (file)
@@ -11,7 +11,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -19,7 +18,6 @@
 #include <mach/at91sam9263.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 
 #include "soc.h"
 #include "generic.h"
@@ -288,12 +286,6 @@ static struct at91_gpio_bank at91sam9263_gpio[] = {
        }
 };
 
-static void at91sam9263_poweroff(void)
-{
-       at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91SAM9263 processor initialization
  * -------------------------------------------------------------------- */
@@ -306,6 +298,7 @@ static void __init at91sam9263_map_io(void)
 
 static void __init at91sam9263_ioremap_registers(void)
 {
+       at91_ioremap_shdwc(AT91SAM9263_BASE_SHDWC);
        at91sam926x_ioremap_pit(AT91SAM9263_BASE_PIT);
        at91sam9_ioremap_smc(0, AT91SAM9263_BASE_SMC0);
        at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
@@ -314,7 +307,6 @@ static void __init at91sam9263_ioremap_registers(void)
 static void __init at91sam9263_initialize(void)
 {
        at91_arch_reset = at91sam9_alt_reset;
-       pm_power_off = at91sam9263_poweroff;
        at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
 
        /* Register GPIO subsystem */
index ce3233f22ed1bc2d90fb7fd3b7c18e3bdc178cd4..7fdf964f6c3adafd58818ac4b2e1ae335d9ecdff 100644 (file)
@@ -11,7 +11,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 #include <linux/dma-mapping.h>
 
 #include <asm/irq.h>
@@ -20,7 +19,6 @@
 #include <mach/at91sam9g45.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 #include <mach/cpu.h>
 
 #include "soc.h"
@@ -323,12 +321,6 @@ static void at91sam9g45_reset(void)
        at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
 }
 
-static void at91sam9g45_poweroff(void)
-{
-       at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91SAM9G45 processor initialization
  * -------------------------------------------------------------------- */
@@ -341,6 +333,7 @@ static void __init at91sam9g45_map_io(void)
 
 static void __init at91sam9g45_ioremap_registers(void)
 {
+       at91_ioremap_shdwc(AT91SAM9G45_BASE_SHDWC);
        at91sam926x_ioremap_pit(AT91SAM9G45_BASE_PIT);
        at91sam9_ioremap_smc(0, AT91SAM9G45_BASE_SMC);
 }
@@ -348,7 +341,6 @@ static void __init at91sam9g45_ioremap_registers(void)
 static void __init at91sam9g45_initialize(void)
 {
        at91_arch_reset = at91sam9g45_reset;
-       pm_power_off = at91sam9g45_poweroff;
        at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
 
        /* Register GPIO subsystem */
index 1bcccd705296114ef10e86565edff43ee47aa149..6856badc518bc4facbebf8f6560ea6451f70003a 100644 (file)
@@ -10,7 +10,6 @@
  */
 
 #include <linux/module.h>
-#include <linux/pm.h>
 
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
@@ -20,7 +19,6 @@
 #include <mach/at91sam9rl.h>
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
-#include <mach/at91_shdwc.h>
 
 #include "soc.h"
 #include "generic.h"
@@ -264,12 +262,6 @@ static struct at91_gpio_bank at91sam9rl_gpio[] = {
        }
 };
 
-static void at91sam9rl_poweroff(void)
-{
-       at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
-}
-
-
 /* --------------------------------------------------------------------
  *  AT91SAM9RL processor initialization
  * -------------------------------------------------------------------- */
@@ -293,6 +285,7 @@ static void __init at91sam9rl_map_io(void)
 
 static void __init at91sam9rl_ioremap_registers(void)
 {
+       at91_ioremap_shdwc(AT91SAM9RL_BASE_SHDWC);
        at91sam926x_ioremap_pit(AT91SAM9RL_BASE_PIT);
        at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
 }
@@ -300,7 +293,6 @@ static void __init at91sam9rl_ioremap_registers(void)
 static void __init at91sam9rl_initialize(void)
 {
        at91_arch_reset = at91sam9_alt_reset;
-       pm_power_off = at91sam9rl_poweroff;
        at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
 
        /* Register GPIO subsystem */
index 89d44c037291f4a2925c7d1ad6da7a092ffeb601..6eb0c935986677d6c65b70baf8090f906bc8bbab 100644 (file)
@@ -251,7 +251,7 @@ static void __init ek_board_init(void)
        /* LEDs */
        at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
        /* shutdown controller, wakeup button (5 msec low) */
-       at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
+       at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
                                | AT91_SHDW_RTTWKEN);
 }
 
index 6f893cf4d336a666dc7c897f1b4d298e76180948..dbc2609fa7fe99c1f140046834a66ffa3b075a2a 100644 (file)
@@ -344,7 +344,7 @@ static void __init ek_board_init(void)
                /* I2C */
                at91_add_device_i2c(NULL, 0);
                /* shutdown controller, wakeup button (5 msec low) */
-               at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10)
+               at91_shdwc_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10)
                                | AT91_SHDW_WKMODE0_LOW
                                | AT91_SHDW_RTTWKEN);
        }
index 8196ecc37ed27a01857ef32816575c95fd789629..bc1776406f426da8304d58323e992ae04f0f16c5 100644 (file)
@@ -60,6 +60,9 @@ extern void at91_irq_resume(void);
 /* reset */
 extern void at91sam9_alt_reset(void);
 
+/* shutdown */
+extern void at91_ioremap_shdwc(u32 base_addr);
+
  /* GPIO */
 #define AT91RM9200_PQFP                3       /* AT91RM9200 PQFP package has 3 banks */
 #define AT91RM9200_BGA         4       /* AT91RM9200 BGA package has 4 banks */
index c4ce07e8a8faa5a1b639d278436a95455804785f..1d4fe822c77a50fb6ac877b546f1846d1a79f3e9 100644 (file)
 #ifndef AT91_SHDWC_H
 #define AT91_SHDWC_H
 
-#define AT91_SHDW_CR           (AT91_SHDWC + 0x00)     /* Shut Down Control Register */
+#ifndef __ASSEMBLY__
+extern void __iomem *at91_shdwc_base;
+
+#define at91_shdwc_read(field) \
+       __raw_readl(at91_shdwc_base + field)
+
+#define at91_shdwc_write(field, value) \
+       __raw_writel(value, at91_shdwc_base + field);
+#endif
+
+#define AT91_SHDW_CR           0x00                    /* Shut Down Control Register */
 #define                AT91_SHDW_SHDW          (1    << 0)             /* Shut Down command */
 #define                AT91_SHDW_KEY           (0xa5 << 24)            /* KEY Password */
 
-#define AT91_SHDW_MR           (AT91_SHDWC + 0x04)     /* Shut Down Mode Register */
+#define AT91_SHDW_MR           0x04                    /* Shut Down Mode Register */
 #define                AT91_SHDW_WKMODE0       (3 << 0)                /* Wake-up 0 Mode Selection */
 #define                        AT91_SHDW_WKMODE0_NONE          0
 #define                        AT91_SHDW_WKMODE0_HIGH          1
@@ -30,7 +40,7 @@
 #define                        AT91_SHDW_CPTWK0_(x)    ((x) << 4)
 #define                AT91_SHDW_RTTWKEN       (1   << 16)             /* Real Time Timer Wake-up Enable */
 
-#define AT91_SHDW_SR           (AT91_SHDWC + 0x08)     /* Shut Down Status Register */
+#define AT91_SHDW_SR           0x08                    /* Shut Down Status Register */
 #define                AT91_SHDW_WAKEUP0       (1 <<  0)               /* Wake-up 0 Status */
 #define                AT91_SHDW_RTTWK         (1 << 16)               /* Real-time Timer Wake-up */
 #define                AT91_SHDW_RTCWK         (1 << 17)               /* Real-time Clock Wake-up [SAM9RL] */
index cd19f0500cd207b403af74adb0383ed4bc37d6c6..5ac468c219af4be1a25029f23c5bcea047273614 100644 (file)
@@ -86,7 +86,6 @@
 #define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC     (0xfffffd10 - AT91_BASE_SYS)
 #define AT91_WDT       (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_GPBR      (cpu_is_at91cap9_revB() ?       \
                        (0xfffffd50 - AT91_BASE_SYS) :  \
@@ -99,6 +98,7 @@
 #define AT91CAP9_BASE_PIOB     0xfffff400
 #define AT91CAP9_BASE_PIOC     0xfffff600
 #define AT91CAP9_BASE_PIOD     0xfffff800
+#define AT91CAP9_BASE_SHDWC    0xfffffd10
 #define AT91CAP9_BASE_RTT      0xfffffd20
 #define AT91CAP9_BASE_PIT      0xfffffd30
 
index f964cfaca379a43d6c3a3c1e3b395291c47149f6..e3c819ab3435321f4c9e21867e8fd8d753e9990e 100644 (file)
@@ -86,7 +86,6 @@
 #define AT91_DBGU      (0xfffff200 - AT91_BASE_SYS)
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC     (0xfffffd10 - AT91_BASE_SYS)
 #define AT91_WDT       (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_GPBR      (0xfffffd50 - AT91_BASE_SYS)
 
@@ -95,6 +94,7 @@
 #define AT91SAM9260_BASE_PIOA  0xfffff400
 #define AT91SAM9260_BASE_PIOB  0xfffff600
 #define AT91SAM9260_BASE_PIOC  0xfffff800
+#define AT91SAM9260_BASE_SHDWC 0xfffffd10
 #define AT91SAM9260_BASE_RTT   0xfffffd20
 #define AT91SAM9260_BASE_PIT   0xfffffd30
 
index 1ea2d6b06c8167dd9d25644068498a4c651c3b45..f9b516368f96bb412f66cfdc1348cba204a376e2 100644 (file)
@@ -71,7 +71,6 @@
 #define AT91_DBGU      (0xfffff200 - AT91_BASE_SYS)
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC     (0xfffffd10 - AT91_BASE_SYS)
 #define AT91_WDT       (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_GPBR      (0xfffffd50 - AT91_BASE_SYS)
 
@@ -79,6 +78,7 @@
 #define AT91SAM9261_BASE_PIOA  0xfffff400
 #define AT91SAM9261_BASE_PIOB  0xfffff600
 #define AT91SAM9261_BASE_PIOC  0xfffff800
+#define AT91SAM9261_BASE_SHDWC 0xfffffd10
 #define AT91SAM9261_BASE_RTT   0xfffffd20
 #define AT91SAM9261_BASE_PIT   0xfffffd30
 
index a62a3a8d9087f95be3f9832a4601073629e1ecd2..28d52d588e906184c97a5e80c215735b321b26ff 100644 (file)
@@ -81,7 +81,6 @@
 #define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC     (0xfffffd10 - AT91_BASE_SYS)
 #define AT91_WDT       (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_GPBR      (0xfffffd60 - AT91_BASE_SYS)
 
@@ -94,6 +93,7 @@
 #define AT91SAM9263_BASE_PIOC  0xfffff600
 #define AT91SAM9263_BASE_PIOD  0xfffff800
 #define AT91SAM9263_BASE_PIOE  0xfffffa00
+#define AT91SAM9263_BASE_SHDWC 0xfffffd10
 #define AT91SAM9263_BASE_RTT0  0xfffffd20
 #define AT91SAM9263_BASE_PIT   0xfffffd30
 #define AT91SAM9263_BASE_RTT1  0xfffffd50
index ac051d427e6be6cab5e055c43c11f4f5689d2ac1..5f3453ef5866f36868abc89e733f42628614b9dd 100644 (file)
@@ -93,7 +93,6 @@
 #define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC     (0xfffffd10 - AT91_BASE_SYS)
 #define AT91_WDT       (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_GPBR      (0xfffffd60 - AT91_BASE_SYS)
 #define AT91_RTC       (0xfffffdb0 - AT91_BASE_SYS)
 #define AT91SAM9G45_BASE_PIOC  0xfffff600
 #define AT91SAM9G45_BASE_PIOD  0xfffff800
 #define AT91SAM9G45_BASE_PIOE  0xfffffa00
+#define AT91SAM9G45_BASE_SHDWC 0xfffffd10
 #define AT91SAM9G45_BASE_RTT   0xfffffd20
 #define AT91SAM9G45_BASE_PIT   0xfffffd30
 
index c945d4d5de3fe6edb265828d68aa5840437fe25e..6f3a4eeb73940f2eae53f434b03512d19c1611ea 100644 (file)
@@ -75,7 +75,6 @@
 #define AT91_DBGU      (0xfffff200 - AT91_BASE_SYS)
 #define AT91_PMC       (0xfffffc00 - AT91_BASE_SYS)
 #define AT91_RSTC      (0xfffffd00 - AT91_BASE_SYS)
-#define AT91_SHDWC     (0xfffffd10 - AT91_BASE_SYS)
 #define AT91_WDT       (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_SCKCR     (0xfffffd50 - AT91_BASE_SYS)
 #define AT91_GPBR      (0xfffffd60 - AT91_BASE_SYS)
@@ -88,6 +87,7 @@
 #define AT91SAM9RL_BASE_PIOB   0xfffff600
 #define AT91SAM9RL_BASE_PIOC   0xfffff800
 #define AT91SAM9RL_BASE_PIOD   0xfffffa00
+#define AT91SAM9RL_BASE_SHDWC  0xfffffd10
 #define AT91SAM9RL_BASE_RTT    0xfffffd20
 #define AT91SAM9RL_BASE_PIT    0xfffffd30
 
index 7046158109d7cd581776466798becc3abbe83f47..3a5b7b4279e76d2ab2ab9063d5260607ed4beda7 100644 (file)
@@ -34,7 +34,7 @@
 /*
  * Show the reason for the previous system reset.
  */
-#if defined(AT91_SHDWC)
+#if defined(AT91_RSTC)
 
 #include <mach/at91_rstc.h>
 #include <mach/at91_shdwc.h>
@@ -58,8 +58,11 @@ static void __init show_reset_status(void)
        char *reason, *r2 = reset;
        u32 reset_type, wake_type;
 
+       if (!at91_shdwc_base)
+               return;
+
        reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
-       wake_type = at91_sys_read(AT91_SHDW_SR);
+       wake_type = at91_shdwc_read(AT91_SHDW_SR);
 
        switch (reset_type) {
        case AT91_RSTC_RSTTYP_GENERAL:
index 63b3ac2595b79ffd33865dcc5e2bf60c845b8c0b..053c36993154e82d4fbcafb8e71eec8dea12a871 100644 (file)
@@ -8,6 +8,7 @@
 #include <linux/module.h>
 #include <linux/io.h>
 #include <linux/mm.h>
+#include <linux/pm.h>
 
 #include <asm/mach/map.h>
 
@@ -15,6 +16,7 @@
 #include <mach/cpu.h>
 #include <mach/at91_dbgu.h>
 #include <mach/at91_pmc.h>
+#include <mach/at91_shdwc.h>
 
 #include "soc.h"
 #include "generic.h"
@@ -285,6 +287,21 @@ void __init at91_map_io(void)
                at91_boot_soc.map_io();
 }
 
+void __iomem *at91_shdwc_base = NULL;
+
+static void at91sam9_poweroff(void)
+{
+       at91_shdwc_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
+}
+
+void __init at91_ioremap_shdwc(u32 base_addr)
+{
+       at91_shdwc_base = ioremap(base_addr, 16);
+       if (!at91_shdwc_base)
+               panic("Impossible to ioremap at91_shdwc_base\n");
+       pm_power_off = at91sam9_poweroff;
+}
+
 void __init at91_initialize(unsigned long main_clock)
 {
        at91_boot_soc.ioremap_registers();