#include "comedi_isadma.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/*
* Register I/O map
struct pcl816_private {
struct comedi_isadma *dma;
unsigned int ai_poll_ptr; /* how many sampes transfer poll */
- unsigned int divisor1;
- unsigned int divisor2;
unsigned int ai_cmd_running:1;
unsigned int ai_cmd_canceled:1;
};
-static void pcl816_start_pacer(struct comedi_device *dev, bool load_counters)
-{
- struct pcl816_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + PCL816_TIMER_BASE;
-
- i8254_set_mode(timer_base, 0, 0, I8254_MODE1 | I8254_BINARY);
- i8254_write(timer_base, 0, 0, 0x00ff);
- udelay(1);
-
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- udelay(1);
-
- if (load_counters) {
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- }
-}
-
static void pcl816_ai_setup_dma(struct comedi_device *dev,
struct comedi_subdevice *s,
unsigned int unread_samples)
static int pcl816_ai_cmdtest(struct comedi_device *dev,
struct comedi_subdevice *s, struct comedi_cmd *cmd)
{
- struct pcl816_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
/* step 4: fix up any arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (devpriv->ai_cmd_running)
return -EBUSY;
- pcl816_start_pacer(dev, false);
-
seglen = check_channel_list(dev, s, cmd->chanlist, cmd->chanlist_len);
if (seglen < 1)
return -EINVAL;
dma->cur_dma = 0;
pcl816_ai_setup_dma(dev, s, 0);
- pcl816_start_pacer(dev, true);
+ comedi_8254_set_mode(dev->pacer, 0, I8254_MODE1 | I8254_BINARY);
+ comedi_8254_write(dev->pacer, 0, 0x0ff);
+ udelay(1);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
ctrl = PCL816_CTRL_INTEN | PCL816_CTRL_DMAEN | PCL816_CTRL_DMASRC_SLOT0;
if (cmd->convert_src == TRIG_TIMER)
outb(PCL816_CTRL_DISABLE_TRIG, dev->iobase + PCL816_CTRL_REG);
pcl816_ai_clear_eoc(dev);
- /* Stop pacer */
- i8254_set_mode(dev->iobase + PCL816_TIMER_BASE, 0,
- 2, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(dev->iobase + PCL816_TIMER_BASE, 0,
- 1, I8254_MODE0 | I8254_BINARY);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
devpriv->ai_cmd_running = 0;
devpriv->ai_cmd_canceled = 1;
static void pcl816_reset(struct comedi_device *dev)
{
- unsigned long timer_base = dev->iobase + PCL816_TIMER_BASE;
-
outb(PCL816_CTRL_DISABLE_TRIG, dev->iobase + PCL816_CTRL_REG);
pcl816_ai_set_chan_range(dev, 0, 0);
pcl816_ai_clear_eoc(dev);
- /* Stop pacer */
- i8254_set_mode(timer_base, 0, 2, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 0, I8254_MODE0 | I8254_BINARY);
-
/* set all digital outputs low */
outb(0, dev->iobase + PCL816_DO_DI_LSB_REG);
outb(0, dev->iobase + PCL816_DO_DI_MSB_REG);
/* an IRQ and DMA are required to support async commands */
pcl816_alloc_irq_and_dma(dev, it);
+ dev->pacer = comedi_8254_init(dev->iobase + PCL816_TIMER_BASE,
+ I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;