]> git.karo-electronics.de Git - linux-beck.git/commitdiff
clk: tegra: Remove CLK_IS_ROOT
authorStephen Boyd <sboyd@codeaurora.org>
Tue, 1 Mar 2016 19:00:02 +0000 (11:00 -0800)
committerStephen Boyd <sboyd@codeaurora.org>
Thu, 3 Mar 2016 01:47:19 +0000 (17:47 -0800)
This flag is a no-op now. Remove usage of the flag.

Acked-by: Rhyland Klein <rklein@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/tegra/clk-audio-sync.c
drivers/clk/tegra/clk-dfll.c
drivers/clk/tegra/clk-tegra-fixed.c
drivers/clk/tegra/clk-tegra114.c
drivers/clk/tegra/clk-tegra20.c

index c0f7843e80e61ba5d947cec90348f9fa89b22e8e..92d04ce2dee6b7e4e5131a1f9052bbee7d5de134 100644 (file)
@@ -72,7 +72,7 @@ struct clk *tegra_clk_register_sync_source(const char *name,
 
        init.ops = &tegra_clk_sync_source_ops;
        init.name = name;
-       init.flags = CLK_IS_ROOT;
+       init.flags = 0;
        init.parent_names = NULL;
        init.num_parents = 0;
 
index 86a307b17eb0a922acd2bac5ea16c6de16f5756e..19bfa07e24b1b67baccc838a016ce4897cb61a11 100644 (file)
@@ -995,7 +995,6 @@ static const struct clk_ops dfll_clk_ops = {
 };
 
 static struct clk_init_data dfll_clk_init_data = {
-       .flags          = CLK_IS_ROOT,
        .ops            = &dfll_clk_ops,
        .num_parents    = 0,
 };
index da0b5941c89ffae2ee3b7b367f0f0413f0a1959a..d64ec7a1b97674ada2c52aa55a5efcf6c675dfb7 100644 (file)
@@ -52,8 +52,7 @@ int __init tegra_osc_clk_init(void __iomem *clk_base, struct tegra_clk *clks,
                return -EINVAL;
        }
 
-       osc = clk_register_fixed_rate(NULL, "osc", NULL, CLK_IS_ROOT,
-                                     *osc_freq);
+       osc = clk_register_fixed_rate(NULL, "osc", NULL, 0, *osc_freq);
 
        dt_clk = tegra_lookup_dt_id(tegra_clk_clk_m, clks);
        if (!dt_clk)
@@ -88,8 +87,7 @@ void __init tegra_fixed_clk_init(struct tegra_clk *tegra_clks)
        /* clk_32k */
        dt_clk = tegra_lookup_dt_id(tegra_clk_clk_32k, tegra_clks);
        if (dt_clk) {
-               clk = clk_register_fixed_rate(NULL, "clk_32k", NULL,
-                                       CLK_IS_ROOT, 32768);
+               clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, 0, 32768);
                *dt_clk = clk;
        }
 
index 4a24aa4bbdea577ca52733275c11c69fffc799b4..df47ec3169c3451b67147d60cba3da83ec5e565b 100644 (file)
@@ -972,8 +972,7 @@ static void __init tegra114_fixed_clk_init(void __iomem *clk_base)
        struct clk *clk;
 
        /* clk_32k */
-       clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, CLK_IS_ROOT,
-                                     32768);
+       clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, 0, 32768);
        clks[TEGRA114_CLK_CLK_32K] = clk;
 
        /* clk_m_div2 */
index 7a48e986c4c97f5a052513ecc600bf5a1979ba8b..7ad63837694f66c60440d548633294948a55dea2 100644 (file)
@@ -837,15 +837,13 @@ static void __init tegra20_periph_clk_init(void)
        clks[TEGRA20_CLK_PEX] = clk;
 
        /* cdev1 */
-       clk = clk_register_fixed_rate(NULL, "cdev1_fixed", NULL, CLK_IS_ROOT,
-                                     26000000);
+       clk = clk_register_fixed_rate(NULL, "cdev1_fixed", NULL, 0, 26000000);
        clk = tegra_clk_register_periph_gate("cdev1", "cdev1_fixed", 0,
                                    clk_base, 0, 94, periph_clk_enb_refcnt);
        clks[TEGRA20_CLK_CDEV1] = clk;
 
        /* cdev2 */
-       clk = clk_register_fixed_rate(NULL, "cdev2_fixed", NULL, CLK_IS_ROOT,
-                                     26000000);
+       clk = clk_register_fixed_rate(NULL, "cdev2_fixed", NULL, 0, 26000000);
        clk = tegra_clk_register_periph_gate("cdev2", "cdev2_fixed", 0,
                                    clk_base, 0, 93, periph_clk_enb_refcnt);
        clks[TEGRA20_CLK_CDEV2] = clk;
@@ -879,8 +877,8 @@ static void __init tegra20_osc_clk_init(void)
        input_freq = tegra20_clk_measure_input_freq();
 
        /* clk_m */
-       clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IS_ROOT |
-                                     CLK_IGNORE_UNUSED, input_freq);
+       clk = clk_register_fixed_rate(NULL, "clk_m", NULL, CLK_IGNORE_UNUSED,
+                                     input_freq);
        clks[TEGRA20_CLK_CLK_M] = clk;
 
        /* pll_ref */