Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5535/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
#define GIC_CPU_INT2 2 /* . */
#define GIC_CPU_INT3 3 /* . */
#define GIC_CPU_INT4 4 /* . */
-#define GIC_CPU_INT5 5 /* Core Interrupt 5 */
+#define GIC_CPU_INT5 5 /* Core Interrupt 7 */
/* Local GIC interrupts. */
#define GIC_INT_TMR (GIC_CPU_INT5)
EXPORT_SYMBOL(__stack_chk_guard);
#endif
-/*
- *
- */
struct mips_frame_info {
void *func;
unsigned long func_size;
uasm_i_srl(p, ptr, ptr, 19);
#else
/*
- * smp_processor_id() << 3 is stored in CONTEXT.
+ * smp_processor_id() << 2 is stored in CONTEXT.
*/
uasm_i_mfc0(p, ptr, C0_CONTEXT);
UASM_i_LA_mostly(p, tmp, pgdc);