drm: omapdrm: Replace DSS manager state check with omapdrm CRTC state

Instead of conditioning planes update based on the DSS manager hardware
state, use the enabled field newly added to the omap_crtc structure.
This reduces the dependency from the DRM layer to the DSS layer.

The enabled field is a transitory measure, the implementation should use
the CRTC atomic state instead. However, given that CRTCs are currently
not enabled/disabled through their .enable() and .disable() operations
but through a convoluted code paths starting at the associated encoder
operations, there is not clear guarantee that the atomic state always
matches the hardware state. This will be refactored later, at which
point the enabled field will be removed.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c
index ea274143cea0935c0d5b46c95050fc1e822b4e87..42c3b44f9689367300d1dd2f48ca5b504b87ed88 100644 (file)
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -40,6 +40,7 @@ struct omap_crtc {
 
        bool ignore_digit_sync_lost;
 
+       bool enabled;
        bool pending;
        wait_queue_head_t pending_wait;
 };
@@ -136,6 +137,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
 
        if (omap_crtc_output[channel]->output_type == OMAP_DISPLAY_TYPE_HDMI) {
                dispc_mgr_enable(channel, enable);
+               omap_crtc->enabled = enable;
                return;
        }
 
@@ -172,6 +174,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
        }
 
        dispc_mgr_enable(channel, enable);
+       omap_crtc->enabled = enable;
 
        ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
        if (ret) {
@@ -411,18 +414,19 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
                dispc_mgr_set_gamma(omap_crtc->channel, lut, length);
        }
 
-       if (dispc_mgr_is_enabled(omap_crtc->channel)) {
+       /* Only flush the CRTC if it is currently enabled. */
+       if (!omap_crtc->enabled)
+               return;
 
-               DBG("%s: GO", omap_crtc->name);
+       DBG("%s: GO", omap_crtc->name);
 
-               rmb();
-               WARN_ON(omap_crtc->pending);
-               omap_crtc->pending = true;
-               wmb();
+       rmb();
+       WARN_ON(omap_crtc->pending);
+       omap_crtc->pending = true;
+       wmb();
 
-               dispc_mgr_go(omap_crtc->channel);
-               omap_irq_register(crtc->dev, &omap_crtc->vblank_irq);
-       }
+       dispc_mgr_go(omap_crtc->channel);
+       omap_irq_register(crtc->dev, &omap_crtc->vblank_irq);
 }
 
 static bool omap_crtc_is_plane_prop(struct drm_crtc *crtc,