Merge branches 'heads/clock-for-v3.16' and 'heads/dt-for-v3.16' into next

diff --cc arch/arm/boot/dts/r8a7740.dtsi
index a4498de64f7d3f41bbb86472cd1ee67d7f1fdc11,8280884bfa596b95d447b11505b775783dc260a2,fbf47fbae3a09468856c67b64aa25c0d0f6e0543..ce7a0b29ae7c56dd165fa4d6ac2fc3f9d0abe786
--- 1/arch/arm/boot/dts/r8a7740.dtsi
--- 2/arch/arm/boot/dts/r8a7740.dtsi
--- 3/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@@@ -139,9 -126,9 -136,8 +136,8 @@@@
        i2c0: i2c@fff20000 {
                #address-cells = <1>;
                #size-cells = <0>;
 -              compatible = "renesas,rmobile-iic";
 +              compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
                reg = <0xfff20000 0x425>;
--              interrupt-parent = <&gic>;
                interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
                              0 202 IRQ_TYPE_LEVEL_HIGH
                              0 203 IRQ_TYPE_LEVEL_HIGH
@@@@ -152,9 -139,9 -148,8 +148,8 @@@@
        i2c1: i2c@e6c20000 {
                #address-cells = <1>;
                #size-cells = <0>;
 -              compatible = "renesas,rmobile-iic";
 +              compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
                reg = <0xe6c20000 0x425>;
--              interrupt-parent = <&gic>;
                interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
                              0 71 IRQ_TYPE_LEVEL_HIGH
                              0 72 IRQ_TYPE_LEVEL_HIGH
@@@@ -187,9 -174,9 -182,8 +182,8 @@@@
        };
   
        mmcif0: mmc@e6bd0000 {
 -              compatible = "renesas,sh-mmcif";
 +              compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
                reg = <0xe6bd0000 0x100>;
--              interrupt-parent = <&gic>;
                interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
                              0 57 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
@@@@ -233,9 -220,9 -224,8 +224,8 @@@@
   
        sh_fsi2: sound@fe1f0000 {
                #sound-dai-cells = <1>;
 -              compatible = "renesas,sh_fsi2";
 +              compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
                reg = <0xfe1f0000 0x400>;
--              interrupt-parent = <&gic>;
                interrupts = <0 9 0x4>;
                status = "disabled";
        };

diff --cc arch/arm/boot/dts/r8a7790.dtsi
index d38d703391490b400e1628052079a9d3f72cc253,10b326bdf831adb1e44315776668b2f4d43f72c9,e6130d6ff28eed65e1fed6ed9551085a24924526..7ff29601f962a01747ca02115d63497e04b48d73
--- 1/arch/arm/boot/dts/r8a7790.dtsi
--- 2/arch/arm/boot/dts/r8a7790.dtsi
--- 3/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@@@ -802,16 -752,16 -808,21 +808,21 @@@@
                mstp9_clks: mstp9_clks@e6150994 {
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-                       clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
 -                      clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
 -                               <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
++                      clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>,
++                               <&cp_clk>, <&cp_clk>, <&cp_clk>,
++                               <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
 +                               <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
 -                              R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
 -                              R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1
 -                              R8A7790_CLK_I2C0
++                              R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3
++                              R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0
 +                              R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
 +                              R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
                        >;
                        clock-output-names =
 -                              "rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
++                              "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
 +                              "rcan1", "rcan0", "qspi_mod", "iic3",
 +                              "i2c3", "i2c2", "i2c1", "i2c0";
                };
        };
   

diff --cc arch/arm/boot/dts/r8a7791.dtsi
index 44f03444ef74e62e0e0b50b6db919ed039d8c300,aa1cba94196c11d0d21349df5980bccc685441fb,5eea08fb3722e480c24146887327b4676e3f4ca7..8d7ffaeff6e03fd3f4b3e56aebd313d4bd743d3d
--- 1/arch/arm/boot/dts/r8a7791.dtsi
--- 2/arch/arm/boot/dts/r8a7791.dtsi
--- 3/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@@@ -805,18 -764,18 -810,23 +810,23 @@@@
                mstp9_clks: mstp9_clks@e6150994 {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-                       clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
 -                      clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>,
 -                               <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
 -                               <&p_clk>;
++                      clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
++                               <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
++                               <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
 +                               <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
 +                               <&hp_clk>, <&hp_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
 -                              R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD
 -                              R8A7791_CLK_I2C5 R8A7791_CLK_I2C4 R8A7791_CLK_I2C3
 -                              R8A7791_CLK_I2C2 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
++                              R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4
++                              R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0
 +                              R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
 +                              R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
 +                              R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
                        >;
                        clock-output-names =
-                               "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3",
 -                              "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3",
--                              "i2c2", "i2c1", "i2c0";
++                              "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0",
++                              "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2",
++                              "i2c1", "i2c0";
                };
                mstp11_clks: mstp11_clks@e615099c {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";

diff --cc include/dt-bindings/clock/r8a7791-clock.h
Simple merge