spi/rockchip: fix bug that case spi can't go as fast as slave request

Because the minimum divisor in rk3x's spi controller is 2,
if spi_clk is less than 2 * sclk_out, we can't get the right divisor.
So we must set spi_clk again to match slave request.

Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index f96ea8a38d640f988a797ecd448b2c9c64e9a8ed..3044c6c2733246a9051f1042fdec4ee37e61cd4f 100644 (file)
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -145,6 +145,9 @@
 #define RXBUSY                                         (1 << 0)
 #define TXBUSY                                         (1 << 1)
 
+/* sclk_out: spi master internal logic in rk3x can support 50Mhz */
+#define MAX_SCLK_OUT           50000000
+
 enum rockchip_ssi_type {
        SSI_MOTO_SPI = 0,
        SSI_TI_SSP,
@@ -496,6 +499,15 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
                        dmacr |= RF_DMA_EN;
        }
 
+       if (WARN_ON(rs->speed > MAX_SCLK_OUT))
+               rs->speed = MAX_SCLK_OUT;
+
+       /* the minimum divsor is 2 */
+       if (rs->max_freq < 2 * rs->speed) {
+               clk_set_rate(rs->spiclk, 2 * rs->speed);
+               rs->max_freq = clk_get_rate(rs->spiclk);
+       }
+
        /* div doesn't support odd number */
        div = max_t(u32, rs->max_freq / rs->speed, 1);
        div = (div + 1) & 0xfffe;