reg = <0x80000000 0x40000000>;
};
- pinmux@70000000 {
+ pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
support-8bit;
};
- ahub@70080000 {
+ ahub {
i2s@70080300 {
status = "disable";
};
model = "NVIDIA Tegra2 Harmony evaluation board";
compatible = "nvidia,harmony", "nvidia,tegra20";
- memory@0 {
+ memory {
reg = <0x00000000 0x40000000>;
};
- pinmux@70000000 {
+ pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
};
};
- pmc@7000f400 {
+ pmc {
nvidia,invert-interrupt;
};
model = "Toshiba AC100 / Dynabook AZ";
compatible = "compal,paz00", "nvidia,tegra20";
- memory@0 {
+ memory {
reg = <0x00000000 0x20000000>;
};
- pinmux@70000000 {
+ pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
status = "disable";
};
- nvec@7000c500 {
+ nvec {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nvidia,nvec";
reg = <0x00000000 0x40000000>;
};
- pinmux@70000000 {
+ pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
};
};
- emc@7000f400 {
+ emc {
emc-table@190000 {
reg = <190000>;
compatible = "nvidia,tegra20-emc-table";
model = "Compulab TrimSlice board";
compatible = "compulab,trimslice", "nvidia,tegra20";
- memory@0 {
+ memory {
reg = <0x00000000 0x40000000>;
};
- pinmux@70000000 {
+ pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
reg = <0x00000000 0x40000000>;
};
- pinmux@70000000 {
+ pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
compatible = "nvidia,tegra20";
interrupt-parent = <&intc>;
- pmc@7000f400 {
+ pmc {
compatible = "nvidia,tegra20-pmc";
reg = <0x7000e400 0x400>;
};
- intc: interrupt-controller@50041000 {
+ intc: interrupt-controller {
compatible = "arm,cortex-a9-gic";
interrupt-controller;
#interrupt-cells = <3>;
0 57 0x04>;
};
- apbdma: dma@6000a000 {
+ apbdma: dma {
compatible = "nvidia,tegra20-apbdma";
reg = <0x6000a000 0x1200>;
interrupts = <0 104 0x04
nvidia,dma-request-selector = <&apbdma 1>;
};
- das@70000c00 {
+ das {
compatible = "nvidia,tegra20-das";
reg = <0x70000c00 0x80>;
};
- gpio: gpio@6000d000 {
+ gpio: gpio {
compatible = "nvidia,tegra20-gpio";
reg = <0x6000d000 0x1000>;
interrupts = <0 32 0x04
interrupt-controller;
};
- pinmux: pinmux@70000000 {
+ pinmux: pinmux {
compatible = "nvidia,tegra20-pinmux";
reg = <0x70000014 0x10 /* Tri-state registers */
0x70000080 0x20 /* Mux registers */
interrupts = <0 91 0x04>;
};
- emc@7000f400 {
+ emc {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nvidia,tegra20-emc";
phy_type = "utmi";
};
- ahb: ahb@6000c004 {
+ ahb {
compatible = "nvidia,tegra20-ahb";
reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */
};
compatible = "nvidia,tegra30";
interrupt-parent = <&intc>;
- pmc@7000f400 {
+ pmc {
compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
reg = <0x7000e400 0x400>;
};
- intc: interrupt-controller@50041000 {
+ intc: interrupt-controller {
compatible = "arm,cortex-a9-gic";
interrupt-controller;
#interrupt-cells = <3>;
0 147 0x04>;
};
- apbdma: dma@6000a000 {
+ apbdma: dma {
compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
reg = <0x6000a000 0x1400>;
interrupts = <0 104 0x04
interrupts = <0 53 0x04>;
};
- gpio: gpio@6000d000 {
+ gpio: gpio {
compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
reg = <0x6000d000 0x1000>;
interrupts = <0 32 0x04
interrupts = <0 31 0x04>;
};
- pinmux: pinmux@70000000 {
+ pinmux: pinmux {
compatible = "nvidia,tegra30-pinmux";
reg = <0x70000868 0xd0 /* Pad control registers */
0x70003000 0x3e0>; /* Mux registers */
};
};
- ahb: ahb@6000c004 {
+ ahb: ahb {
compatible = "nvidia,tegra30-ahb";
reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */
};