return res1->start <= res2->start && res1->end >= res2->end;
}
-void pci_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
- struct resource *res)
+void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+ struct resource *res)
{
struct pci_host_bridge *bridge = pci_host_bridge(dev);
struct pci_host_bridge_window *window;
region->start = res->start - offset;
region->end = res->end - offset;
}
+EXPORT_SYMBOL(pcibios_resource_to_bus);
static bool region_contains(struct pci_bus_region *region1,
struct pci_bus_region *region2)
return region1->start <= region2->start && region1->end >= region2->end;
}
-void pci_bus_to_resource(struct pci_dev *dev, struct resource *res,
- struct pci_bus_region *region)
+void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+ struct pci_bus_region *region)
{
struct pci_host_bridge *bridge = pci_host_bridge(dev);
struct pci_host_bridge_window *window;
res->start = region->start + offset;
res->end = region->end + offset;
}
-
-#ifdef ARCH_HAS_GENERIC_PCI_OFFSETS
-void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
- struct resource *res)
-{
- pci_resource_to_bus(dev, region, res);
-}
-EXPORT_SYMBOL(pcibios_resource_to_bus);
-
-void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
- struct pci_bus_region *region)
-{
- pci_bus_to_resource(dev, res, region);
-}
EXPORT_SYMBOL(pcibios_bus_to_resource);
-#endif
/*
* PCI Bus Class
pci_write_config_dword(dev, pos + 4, 0);
region.start = 0;
region.end = sz64;
- pci_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev, res, ®ion);
} else {
region.start = l64;
region.end = l64 + sz64;
- pci_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev, res, ®ion);
dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",
pos, res);
}
region.start = l;
region.end = l + sz;
- pci_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev, res, ®ion);
dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
}
res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
region.start = base;
region.end = limit + 0xfff;
- pci_bus_to_resource(dev, &res2, ®ion);
+ pcibios_bus_to_resource(dev, &res2, ®ion);
if (!res->start)
res->start = res2.start;
if (!res->end)
res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
region.start = base;
region.end = limit + 0xfffff;
- pci_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev, res, ®ion);
dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
}
}
res->flags |= IORESOURCE_MEM_64;
region.start = base;
region.end = limit + 0xfffff;
- pci_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev, res, ®ion);
dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
}
}
region.end = 0x1F7;
res = &dev->resource[0];
res->flags = LEGACY_IO_RESOURCE;
- pci_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev, res, ®ion);
region.start = 0x3F6;
region.end = 0x3F6;
res = &dev->resource[1];
res->flags = LEGACY_IO_RESOURCE;
- pci_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev, res, ®ion);
}
if ((progif & 4) == 0) {
region.start = 0x170;
region.end = 0x177;
res = &dev->resource[2];
res->flags = LEGACY_IO_RESOURCE;
- pci_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev, res, ®ion);
region.start = 0x376;
region.end = 0x376;
res = &dev->resource[3];
res->flags = LEGACY_IO_RESOURCE;
- pci_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev, res, ®ion);
}
}
break;