]> git.karo-electronics.de Git - linux-beck.git/commitdiff
powerpc/dts: Unify B4 mux nodes
authorIgal Liberman <Igal.Liberman@freescale.com>
Mon, 12 Jan 2015 06:03:57 +0000 (08:03 +0200)
committerScott Wood <scottwood@freescale.com>
Wed, 3 Jun 2015 02:37:18 +0000 (21:37 -0500)
Signed-off-by: Igal Liberman <Igal.Liberman@freescale.com>
Change-Id: Ic5f28f7b492b708f00a5ff74dda723ce5e1da0ba
Signed-off-by: Scott Wood <scottwood@freescale.com>
arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
arch/powerpc/boot/dts/fsl/b4si-post.dtsi

index 86161ae6c966e091ef32c053e8662f44b804d927..1ea8602e4345f4a3bde9bdd57f959cdd0c8c51ef 100644 (file)
                compatible = "fsl,b4420-device-config", "fsl,qoriq-device-config-2.0";
        };
 
-/include/ "qoriq-clockgen2.dtsi"
        global-utilities@e1000 {
-               compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0";
-
-               mux0: mux0@0 {
-                       #clock-cells = <0>;
-                       reg = <0x0 0x4>;
-                       compatible = "fsl,qoriq-core-mux-2.0";
-                       clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
-                               <&pll1 0>, <&pll1 1>, <&pll1 2>;
-                       clock-names = "pll0", "pll0-div2", "pll0-div4",
-                               "pll1", "pll1-div2", "pll1-div4";
-                       clock-output-names = "cmux0";
-               };
+               compatible = "fsl,b4420-clockgen", "fsl,b4-clockgen",
+                             "fsl,qoriq-clockgen-2.0";
        };
 
        rcpm: global-utilities@e2000 {
index f35e9e0a54455793d306a2ede44141f0636a2f16..68b9a0536485220d25160c550830c765cc76ecc7 100644 (file)
                compatible = "fsl,b4860-device-config", "fsl,qoriq-device-config-2.0";
        };
 
-/include/ "qoriq-clockgen2.dtsi"
        global-utilities@e1000 {
-               compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0";
-
-               mux0: mux0@0 {
-                       #clock-cells = <0>;
-                       reg = <0x0 0x4>;
-                       compatible = "fsl,qoriq-core-mux-2.0";
-                       clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
-                               <&pll1 0>, <&pll1 1>, <&pll1 2>;
-                       clock-names = "pll0", "pll0-div2", "pll0-div4",
-                               "pll1", "pll1-div2", "pll1-div4";
-                       clock-output-names = "cmux0";
-               };
+               compatible = "fsl,b4860-clockgen", "fsl,b4-clockgen",
+                             "fsl,qoriq-clockgen-2.0";
        };
 
        rcpm: global-utilities@e2000 {
index 73136c0029d223f1b19d372dd58b0891ed61c0b4..c6bab55bb0656446b68095a411dd33defee0e187 100644 (file)
                fsl,liodn-bits = <12>;
        };
 
+/include/ "qoriq-clockgen2.dtsi"
        clockgen: global-utilities@e1000 {
                compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";
                reg = <0xe1000 0x1000>;
+
+               mux0: mux0@0 {
+                       #clock-cells = <0>;
+                       reg = <0x0 0x4>;
+                       compatible = "fsl,qoriq-core-mux-2.0";
+                       clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+                               <&pll1 0>, <&pll1 1>, <&pll1 2>;
+                       clock-names = "pll0", "pll0-div2", "pll0-div4",
+                               "pll1", "pll1-div2", "pll1-div4";
+                       clock-output-names = "cmux0";
+               };
        };
 
        rcpm: global-utilities@e2000 {