]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
[media] adv7604/ad9389b/ths8200: decrease min_pixelclock to 25MHz
authorHans Verkuil <hans.verkuil@cisco.com>
Mon, 19 Aug 2013 11:07:26 +0000 (08:07 -0300)
committerMauro Carvalho Chehab <m.chehab@samsung.com>
Sat, 24 Aug 2013 07:27:09 +0000 (04:27 -0300)
The CEA-861 standard allows for the 640x480 format at 25.175 MHz.
Ensure that that's allowed according to the struct v4l2_bt_timings_cap.

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
drivers/media/i2c/ad9389b.c
drivers/media/i2c/adv7604.c
drivers/media/i2c/ths8200.c

index 1c6d352acfa093362122325057460b6a81391546..bb74fb6b35c73c02a3c2be753ba352dd23488dee 100644 (file)
@@ -631,7 +631,7 @@ static const struct v4l2_dv_timings_cap ad9389b_timings_cap = {
        .bt = {
                .max_width = 1920,
                .max_height = 1200,
-               .min_pixelclock = 27000000,
+               .min_pixelclock = 25000000,
                .max_pixelclock = 170000000,
                .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
                        V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
index a1a9d1e805f031f6f9964f063648611db96a9ae1..5b54ba1465e12848b5254780f0d28b06b2dffe42 100644 (file)
@@ -1162,7 +1162,7 @@ static int adv7604_dv_timings_cap(struct v4l2_subdev *sd,
        cap->type = V4L2_DV_BT_656_1120;
        cap->bt.max_width = 1920;
        cap->bt.max_height = 1200;
-       cap->bt.min_pixelclock = 27000000;
+       cap->bt.min_pixelclock = 25000000;
        if (DIGITAL_INPUT)
                cap->bt.max_pixelclock = 225000000;
        else
index 49041e577e134b286919feb00e84510f2b1b9fe2..580bd1b179fbb55f59bd4eeda4cbc3cb40fa95cb 100644 (file)
@@ -49,7 +49,7 @@ static const struct v4l2_dv_timings_cap ths8200_timings_cap = {
        .bt = {
                .max_width = 1920,
                .max_height = 1080,
-               .min_pixelclock = 27000000,
+               .min_pixelclock = 25000000,
                .max_pixelclock = 148500000,
                .standards = V4L2_DV_BT_STD_CEA861,
                .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE,