]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
ARM: GIC: consolidate gic_cpu_base_addr to common GIC code
authorRussell King <rmk+kernel@arm.linux.org.uk>
Sat, 4 Dec 2010 16:13:29 +0000 (16:13 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Tue, 14 Dec 2010 19:21:42 +0000 (19:21 +0000)
Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt.  Move this into the common GIC code.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
18 files changed:
arch/arm/common/gic.c
arch/arm/include/asm/hardware/gic.h
arch/arm/mach-cns3xxx/core.c
arch/arm/mach-cns3xxx/core.h
arch/arm/mach-msm/board-msm8x60.c
arch/arm/mach-omap2/include/mach/omap4-common.h
arch/arm/mach-omap2/omap4-common.c
arch/arm/mach-realview/core.c
arch/arm/mach-realview/core.h
arch/arm/mach-realview/realview_eb.c
arch/arm/mach-realview/realview_pb1176.c
arch/arm/mach-realview/realview_pb11mp.c
arch/arm/mach-realview/realview_pba8.c
arch/arm/mach-realview/realview_pbx.c
arch/arm/mach-s5pv310/cpu.c
arch/arm/mach-s5pv310/include/mach/smp.h
arch/arm/mach-vexpress/core.h
arch/arm/mach-vexpress/ct-ca9x4.c

index dd0d18d560ac8680f5db34f8e7385b8652ba5792..9105d48c02de16172e6b5ca4aa785d2a4c8d0f26 100644 (file)
@@ -35,6 +35,9 @@
 
 static DEFINE_SPINLOCK(irq_controller_lock);
 
+/* Address of GIC 0 CPU interface */
+void __iomem *gic_cpu_base_addr;
+
 struct gic_chip_data {
        unsigned int irq_offset;
        void __iomem *dist_base;
@@ -317,6 +320,8 @@ static void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
 void __init gic_init(unsigned int gic_nr, unsigned int irq_start,
        void __iomem *dist_base, void __iomem *cpu_base)
 {
+       if (gic_nr == 0)
+               gic_cpu_base_addr = cpu_base;
        gic_dist_init(gic_nr, dist_base, irq_start);
        gic_cpu_init(gic_nr, cpu_base);
 }
index 48876a3fbda88c826b4ab841365b53f6da2fc319..a82a7770354414a1b1a1414680cac727e4564115 100644 (file)
@@ -33,6 +33,8 @@
 #define GIC_DIST_SOFTINT               0xf00
 
 #ifndef __ASSEMBLY__
+extern void __iomem *gic_cpu_base_addr;
+
 void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);
 void gic_secondary_init(unsigned int);
 void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
index e9c491552ca16cd34851a6ed6cda0c49acae0d80..da30078a80c16078192373b67ac0ed59de30a7a7 100644 (file)
@@ -69,13 +69,10 @@ void __init cns3xxx_map_io(void)
 }
 
 /* used by entry-macro.S */
-void __iomem *gic_cpu_base_addr;
-
 void __init cns3xxx_init_irq(void)
 {
-       gic_cpu_base_addr = __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT);
        gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
-               gic_cpu_base_addr);
+                __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT));
 }
 
 void cns3xxx_power_off(void)
index 6b33ec11346e54b701fa61867804ecd1120d76e2..ef9e5116b1a99d89f26affcffd66deff5d997b19 100644 (file)
@@ -11,7 +11,6 @@
 #ifndef __CNS3XXX_CORE_H
 #define __CNS3XXX_CORE_H
 
-extern void __iomem *gic_cpu_base_addr;
 extern struct sys_timer cns3xxx_timer;
 
 void __init cns3xxx_map_io(void);
index aaf8ec8a1495621bb64e598d762e79ed6c3eb749..9b5eb2b4ae1b8507a78927e43ce8c9c27b4220f6 100644 (file)
@@ -28,8 +28,6 @@
 #include <mach/board.h>
 #include <mach/msm_iomap.h>
 
-void __iomem *gic_cpu_base_addr;
-
 unsigned long clk_get_max_axi_khz(void)
 {
        return 0;
@@ -44,8 +42,8 @@ static void __init msm8x60_init_irq(void)
 {
        unsigned int i;
 
-       gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE;
-       gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, gic_cpu_base_addr);
+       gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,
+                (void *)MSM_QGIC_CPU_BASE);
 
        /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
        writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
index 2744dfee1ff4875cad6e6b2faac9a292020e2065..5b0270b289348116fe92a7741f2cab6f6aa0350b 100644 (file)
@@ -24,7 +24,6 @@
 extern void __iomem *l2cache_base;
 #endif
 
-extern void __iomem *gic_cpu_base_addr;
 extern void __iomem *gic_dist_base_addr;
 
 extern void __init gic_init_irq(void);
index 3fd3df7a7697310108b173d950c66c7e548092d9..666e852988d5d21dfcda20e8ea7779a17fe94d97 100644 (file)
 void __iomem *l2cache_base;
 #endif
 
-void __iomem *gic_cpu_base_addr;
 void __iomem *gic_dist_base_addr;
 
 
 void __init gic_init_irq(void)
 {
+       void __iomem *gic_cpu_base;
+
        /* Static mapping, never released */
        gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
        BUG_ON(!gic_dist_base_addr);
 
        /* Static mapping, never released */
-       gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
-       BUG_ON(!gic_cpu_base_addr);
+       gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
+       BUG_ON(!gic_cpu_base);
 
-       gic_init(0, 29, gic_dist_base_addr, gic_cpu_base_addr);
+       gic_init(0, 29, gic_dist_base_addr, gic_cpu_base);
 }
 
 #ifdef CONFIG_CACHE_L2X0
index 07c08151dfe6434be39b510e215acd79e86ea297..e292eb8c3c4eea47db5917c9c9ee9e650dcd0d4b 100644 (file)
@@ -54,9 +54,6 @@
 
 #include "core.h"
 
-/* used by entry-macro.S and platsmp.c */
-void __iomem *gic_cpu_base_addr;
-
 #ifdef CONFIG_ZONE_DMA
 /*
  * Adjust the zones if there are restrictions for DMA access.
index 781bca68a9fadcbe4dec1883e837dcf33a167866..693239ddc39e4cc15653575c9c50081cf10c9213 100644 (file)
@@ -53,7 +53,6 @@ extern struct platform_device realview_i2c_device;
 extern struct mmci_platform_data realview_mmc0_plat_data;
 extern struct mmci_platform_data realview_mmc1_plat_data;
 extern struct clcd_board clcd_plat_data;
-extern void __iomem *gic_cpu_base_addr;
 extern void __iomem *timer0_va_base;
 extern void __iomem *timer1_va_base;
 extern void __iomem *timer2_va_base;
index 241bcbc73f614caf2e6099d12e2606e914e12289..6ef5c5e528b251b86ec91f6f7102788265a62ec3 100644 (file)
@@ -364,9 +364,8 @@ static void __init gic_init_irq(void)
                writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
 
                /* core tile GIC, primary */
-               gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
                gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE),
-                        gic_cpu_base_addr);
+                        __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
 
 #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
                /* board GIC, secondary */
@@ -376,9 +375,8 @@ static void __init gic_init_irq(void)
 #endif
        } else {
                /* board GIC, primary */
-               gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE);
                gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE),
-                        gic_cpu_base_addr);
+                        __io_address(REALVIEW_EB_GIC_CPU_BASE));
        }
 }
 
index 8047b198f847863e0e269858c9b6eadaae955beb..cbdc97a5685fc11ad764587414f56a8420cb02ab 100644 (file)
@@ -304,10 +304,9 @@ static struct platform_device char_lcd_device = {
 static void __init gic_init_irq(void)
 {
        /* ARM1176 DevChip GIC, primary */
-       gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE);
        gic_init(0, IRQ_DC1176_GIC_START,
                 __io_address(REALVIEW_DC1176_GIC_DIST_BASE),
-                gic_cpu_base_addr);
+                __io_address(REALVIEW_DC1176_GIC_CPU_BASE));
 
        /* board GIC, secondary */
        gic_init(1, IRQ_PB1176_GIC_START,
index 61204265b4e4a2de7404ecf95602434e02fccba0..8e8ab7d29a6a0d8b6b020b7ea513e6ec8c96c021 100644 (file)
@@ -309,9 +309,8 @@ static void __init gic_init_irq(void)
        writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
 
        /* ARM11MPCore test chip GIC, primary */
-       gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE);
        gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE),
-                gic_cpu_base_addr);
+                __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
 
        /* board GIC, secondary */
        gic_init(1, IRQ_PB11MP_GIC_START,
index 90f492a35d4f37384411fbf1029e345910b859fd..841118e3e118c7383be126131f8dc5ef125b6461 100644 (file)
@@ -273,7 +273,6 @@ static struct platform_device pmu_device = {
 static void __init gic_init_irq(void)
 {
        /* ARM PB-A8 on-board GIC */
-       gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
        gic_init(0, IRQ_PBA8_GIC_START,
                 __io_address(REALVIEW_PBA8_GIC_DIST_BASE),
                 __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
index 86f28f725a236d88c9d596488a0bf36b6163b3de..02b755b009dbc0c859f0ebf9d98bbf7f6ea96ad9 100644 (file)
@@ -313,11 +313,9 @@ static void __init gic_init_irq(void)
 {
        /* ARM PBX on-board GIC */
        if (core_tile_pbx11mp() || core_tile_pbxa9mp()) {
-               gic_cpu_base_addr = __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE);
                gic_init(0, 29, __io_address(REALVIEW_PBX_TILE_GIC_DIST_BASE),
                         __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE));
        } else {
-               gic_cpu_base_addr = __io_address(REALVIEW_PBX_GIC_CPU_BASE);
                gic_init(0, IRQ_PBX_GIC_START,
                         __io_address(REALVIEW_PBX_GIC_DIST_BASE),
                         __io_address(REALVIEW_PBX_GIC_CPU_BASE));
index bce3e91be432b6ed872327a10f0a71c0cee2eb54..72ab289e78166bfb102f6e4e46dc44cfb7f548ac 100644 (file)
@@ -24,8 +24,6 @@
 
 #include <mach/regs-irq.h>
 
-void __iomem *gic_cpu_base_addr;
-
 extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
                         unsigned int irq_start);
 extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
@@ -122,7 +120,6 @@ void __init s5pv310_init_irq(void)
 {
        int irq;
 
-       gic_cpu_base_addr = S5P_VA_GIC_CPU;
        gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
 
        for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
index b7ec252384f47059f681ddad95c1d183ad8b39dc..e1cc6a251c6ac9461996c37112dda226097a2117 100644 (file)
@@ -9,8 +9,6 @@
 #include <asm/hardware/gic.h>
 #include <asm/smp_mpidr.h>
 
-extern void __iomem *gic_cpu_base_addr;
-
 /*
  * We use IRQ1 as the IPI
  */
index 57dd95ce41f90f677f0f5a7de2db2f8ea8be5b7a..362780d868de02f5c5ea0e42c3d80e5b02f09607 100644 (file)
@@ -22,5 +22,3 @@ struct map_desc;
 
 void v2m_map_io(struct map_desc *tile, size_t num);
 extern struct sys_timer v2m_timer;
-
-extern void __iomem *gic_cpu_base_addr;
index 25a3ca6e5a482393633aaf947f43da789f859304..8e0a3b7c86381e29f36885f3404a06eded7d86dc 100644 (file)
@@ -60,12 +60,10 @@ static void __init ct_ca9x4_map_io(void)
        v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
 }
 
-void __iomem *gic_cpu_base_addr;
-
 static void __init ct_ca9x4_init_irq(void)
 {
-       gic_cpu_base_addr = MMIO_P2V(A9_MPCORE_GIC_CPU);
-       gic_init(0, 29, MMIO_P2V(A9_MPCORE_GIC_DIST), gic_cpu_base_addr);
+       gic_init(0, 29, MMIO_P2V(A9_MPCORE_GIC_DIST),
+                MMIO_P2V(A9_MPCORE_GIC_CPU));
 }
 
 #if 0