]> git.karo-electronics.de Git - linux-beck.git/commitdiff
sh: Fix SH-3 cache entry_mask and way_size calculation.
authorPaul Mundt <lethal@linux-sh.org>
Mon, 12 Mar 2007 07:15:22 +0000 (16:15 +0900)
committerPaul Mundt <lethal@linux-sh.org>
Mon, 12 Mar 2007 07:15:22 +0000 (16:15 +0900)
The code for performing the calculation was only in the SH-4 probe
path, move it out to the common path so the other parts get this
right too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/kernel/cpu/init.c
arch/sh/kernel/cpu/sh4/probe.c

index 4b339a640b13c86dc02d9a6de09eab4f8c8ab9f0..726acfcb9b77bb8d94f879b6aeca4d309c9c1d82 100644 (file)
@@ -3,7 +3,7 @@
  *
  * CPU init code
  *
- * Copyright (C) 2002 - 2006  Paul Mundt
+ * Copyright (C) 2002 - 2007  Paul Mundt
  * Copyright (C) 2003  Richard Curnow
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -48,8 +48,19 @@ static void __init cache_init(void)
 {
        unsigned long ccr, flags;
 
-       if (current_cpu_data.type == CPU_SH_NONE)
-               panic("Unknown CPU");
+       /* First setup the rest of the I-cache info */
+       current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr -
+                                     current_cpu_data.icache.linesz;
+
+       current_cpu_data.icache.way_size = current_cpu_data.icache.sets *
+                                   current_cpu_data.icache.linesz;
+
+       /* And the D-cache too */
+       current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr -
+                                     current_cpu_data.dcache.linesz;
+
+       current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
+                                   current_cpu_data.dcache.linesz;
 
        jump_to_P2();
        ccr = ctrl_inl(CCR);
@@ -200,6 +211,9 @@ asmlinkage void __init sh_cpu_init(void)
        /* First, probe the CPU */
        detect_cpu_and_cache_system();
 
+       if (current_cpu_data.type == CPU_SH_NONE)
+               panic("Unknown CPU");
+
        /* Init the cache */
        cache_init();
 
index 9d28c88d2f9de65f829c8cf96208c5ac0705067d..58950de2696d1ab5285fa1024d19ebcfc8ee2ff3 100644 (file)
@@ -195,13 +195,6 @@ int __init detect_cpu_and_cache_system(void)
 
        }
 
-       /* Setup the rest of the I-cache info */
-       current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr -
-                                     current_cpu_data.icache.linesz;
-
-       current_cpu_data.icache.way_size = current_cpu_data.icache.sets *
-                                   current_cpu_data.icache.linesz;
-
        /* And the rest of the D-cache */
        if (current_cpu_data.dcache.ways > 1) {
                size = sizes[(cvr >> 16) & 0xf];
@@ -209,12 +202,6 @@ int __init detect_cpu_and_cache_system(void)
                current_cpu_data.dcache.sets            = (size >> 6);
        }
 
-       current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr -
-                                     current_cpu_data.dcache.linesz;
-
-       current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
-                                   current_cpu_data.dcache.linesz;
-
        /*
         * Setup the L2 cache desc
         *