From: Sylwester Nawrocki Date: Mon, 22 Aug 2016 09:14:49 +0000 (+0200) Subject: clk: samsung: exynos5410: Expose the peripheral DMA gate clocks X-Git-Tag: v4.9-rc1~142^2~48^2~5 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=0299042dca9689cdccfaaf00c5f64425c3ac360f;p=karo-tx-linux.git clk: samsung: exynos5410: Expose the peripheral DMA gate clocks These clocks are needed in order to use the PL330 peripheral DMA controllers. Signed-off-by: Sylwester Nawrocki --- diff --git a/drivers/clk/samsung/clk-exynos5410.c b/drivers/clk/samsung/clk-exynos5410.c index 5488a4460c15..eefed92a59aa 100644 --- a/drivers/clk/samsung/clk-exynos5410.c +++ b/drivers/clk/samsung/clk-exynos5410.c @@ -176,6 +176,8 @@ static const struct samsung_gate_clock exynos5410_gate_clks[] __initconst = { GATE(CLK_MMC0, "sdmmc0", "aclk200", GATE_BUS_FSYS0, 12, 0, 0), GATE(CLK_MMC1, "sdmmc1", "aclk200", GATE_BUS_FSYS0, 13, 0, 0), GATE(CLK_MMC2, "sdmmc2", "aclk200", GATE_BUS_FSYS0, 14, 0, 0), + GATE(CLK_PDMA1, "pdma1", "aclk200", GATE_BUS_FSYS0, 2, 0, 0), + GATE(CLK_PDMA0, "pdma0", "aclk200", GATE_BUS_FSYS0, 1, 0, 0), GATE(CLK_SCLK_USBPHY301, "sclk_usbphy301", "dout_usbphy301", GATE_TOP_SCLK_FSYS, 7, CLK_SET_RATE_PARENT, 0),