From: Paul E. McKenney Date: Sun, 28 Aug 2011 17:35:59 +0000 (-0700) Subject: powerpc: Strengthen value-returning-atomics memory barriers X-Git-Tag: next-20110914~19^2~7 X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=02bfde5587941bd3fa4ead5d5884063d9a93c9ff;p=karo-tx-linux.git powerpc: Strengthen value-returning-atomics memory barriers The trailing isync/lwsync in PowerPC value-returning atomics needs to be a sync in order to provide the required ordering properties. The leading lwsync/eieio can remain, as the remainder of the required ordering guarantees are provided by the atomic instructions: Any reordering will cause the stwcx to fail, which will result in a retry. This commit provides the needed adjustment. Signed-off-by: Paul E. McKenney Cc: anton@samba.org Cc: benh@kernel.crashing.org Cc: paulus@samba.org --- diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h index d7cab44643c5..4d97fbeee74d 100644 --- a/arch/powerpc/include/asm/synch.h +++ b/arch/powerpc/include/asm/synch.h @@ -37,11 +37,7 @@ static inline void isync(void) #endif #ifdef CONFIG_SMP -#define __PPC_ACQUIRE_BARRIER \ - START_LWSYNC_SECTION(97); \ - isync; \ - MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup); -#define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER) +#define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(sync;) #define PPC_RELEASE_BARRIER stringify_in_c(LWSYNC) "\n" #else #define PPC_ACQUIRE_BARRIER