From: James Hogan Date: Tue, 19 Apr 2016 08:25:00 +0000 (+0100) Subject: MIPS: Fix HTW config on XPA kernel without LPA enabled X-Git-Url: https://git.karo-electronics.de/?a=commitdiff_plain;h=14bc241443e126c62fcbf571b7d4c79740debc58;p=linux-beck.git MIPS: Fix HTW config on XPA kernel without LPA enabled The hardware page table walker (HTW) configuration is broken on XPA kernels where XPA couldn't be enabled (either nohtw or the hardware doesn't support it). This is because the PWSize.PTEW field (PTE width) was only set to 8 bytes (an extra shift of 1) in config_htw_params() if PageGrain.ELPA (enable large physical addressing) is set. On an XPA kernel though the size of PTEs is fixed at 8 bytes regardless of whether XPA could actually be enabled. Fix the initialisation of this field based on sizeof(pte_t) instead. Fixes: c5b367835cfc ("MIPS: Add support for XPA.") Signed-off-by: James Hogan Cc: Steven J. Hill Cc: Paul Burton Cc: Paul Gortmaker Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13113/ Signed-off-by: Paul Burton Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 7153e1fb0cd4..baad605db878 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -2424,9 +2424,7 @@ static void config_htw_params(void) if (CONFIG_PGTABLE_LEVELS >= 3) pwsize |= ilog2(PTRS_PER_PMD) << MIPS_PWSIZE_MDW_SHIFT; - /* If XPA has been enabled, PTEs are 64-bit in size. */ - if (config_enabled(CONFIG_64BITS) || (read_c0_pagegrain() & PG_ELPA)) - pwsize |= 1; + pwsize |= ilog2(sizeof(pte_t)/4) << MIPS_PWSIZE_PTEW_SHIFT; write_c0_pwsize(pwsize);